Change history:
v8: - Chaged link lanes and rate parameters to u8
v7: - Fixed formatting - Fixed 'unused variable' compile warning - Fixed comment format
v6: - Submited from (hopefully) the correct repo to fix build error
v5: - Fixed min_t() macro arguments
v4: - Fixed drm/radeon/ lane count and rate
v3: - Fixed check-patch errors
v2: - No changes, this was my mistaken reply to my patch
v1: - Initial revision
Nikola Cornij (1): drm/drm_mst: Use Extended Base Receiver Capability DPCD space
.../display/amdgpu_dm/amdgpu_dm_mst_types.c | 5 +++ .../gpu/drm/amd/display/dc/core/dc_link_dp.c | 18 ++++++++++ drivers/gpu/drm/amd/display/dc/dc_link.h | 2 ++ drivers/gpu/drm/drm_dp_mst_topology.c | 33 ++++++++++++------- drivers/gpu/drm/i915/display/intel_dp_mst.c | 6 +++- drivers/gpu/drm/nouveau/dispnv50/disp.c | 3 +- drivers/gpu/drm/radeon/radeon_dp_mst.c | 7 ++++ include/drm/drm_dp_mst_helper.h | 12 ++++++- 8 files changed, 71 insertions(+), 15 deletions(-)