Hi, Jitao:
On Fri, 2019-09-20 at 17:04 +0800, Jitao Shi wrote:
Update device tree binding documentation for the dsi for Mediatek MT8183 SoCs.
Signed-off-by: Jitao Shi jitao.shi@mediatek.com Acked-by: Rob Herring robh@kernel.org
This version is different with previous version [1], so I think you should drop the 'Acked-by' tag.
[1] https://patchwork.kernel.org/patch/11081701/
Regards, CK
.../bindings/display/mediatek/mediatek,dsi.txt | 15 ++++++++++++--- 1 file changed, 12 insertions(+), 3 deletions(-)
diff --git a/Documentation/devicetree/bindings/display/mediatek/mediatek,dsi.txt b/Documentation/devicetree/bindings/display/mediatek/mediatek,dsi.txt index fadf327c7cdf..993ff079ac09 100644 --- a/Documentation/devicetree/bindings/display/mediatek/mediatek,dsi.txt +++ b/Documentation/devicetree/bindings/display/mediatek/mediatek,dsi.txt @@ -7,7 +7,7 @@ channel output.
Required properties:
- compatible: "mediatek,<chip>-dsi"
- the supported chips are mt2701 and mt8173.
- the supported chips are mt2701, mt8173 and mt8183.
- reg: Physical base address and length of the controller's registers
- interrupts: The interrupt signal from the function block.
- clocks: device clocks
@@ -26,22 +26,31 @@ The MIPI TX configuration module controls the MIPI D-PHY.
Required properties:
- compatible: "mediatek,<chip>-mipi-tx"
- the supported chips are mt2701 and mt8173.
- the supported chips are mt2701, mt8173 and mt8183.
- reg: Physical base address and length of the controller's registers
- clocks: PLL reference clock
- clock-output-names: name of the output clock line to the DSI encoder
- #clock-cells: must be <0>;
- #phy-cells: must be <0>.
+Optional properties: +- nvmem-cells: A phandle to the calibration data provided by a nvmem device. If
unspecified default values shall be used.+- nvmem-cell-names: Should be "calibration-data" +- mipitx-current-drive: adjust driving current, should be 1 ~ 0xF
Example:
mipi_tx0: mipi-dphy@10215000 { compatible = "mediatek,mt8173-mipi-tx"; reg = <0 0x10215000 0 0x1000>; clocks = <&clk26m>;
- clock-output-names = "mipi_tx0_pll"; #clock-cells = <0>; #phy-cells = <0>;
- clock-output-names = "mipi_tx0_pll";
- nvmem-cells= <&mipi_tx_calibration>;
- nvmem-cell-names = "calibration-data";
- mipitx-current-drive = <0x8>;
};
dsi0: dsi@1401b000 {