Ivan, can you try this patch?
Linus is going to make some more snide comments if he sees just how many of these trivial-ish patches that I have pending...
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If we need to wait until the next vblank for the register to be updated and to take effect, make sure the write is actually flushed to the register prior to sleeping.
Signed-off-by: Chris Wilson chris@chris-wilson.co.uk --- drivers/gpu/drm/i915/intel_tv.c | 9 ++++++++- 1 files changed, 8 insertions(+), 1 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_tv.c b/drivers/gpu/drm/i915/intel_tv.c index d2029ef..19b9739 100644 --- a/drivers/gpu/drm/i915/intel_tv.c +++ b/drivers/gpu/drm/i915/intel_tv.c @@ -1157,10 +1157,13 @@ intel_tv_mode_set(struct drm_encoder *encoder, struct drm_display_mode *mode, I915_WRITE(dspbase_reg, I915_READ(dspbase_reg));
/* Wait for vblank for the disable to take effect */ - if (!IS_I9XX(dev)) + if (!IS_I9XX(dev)) { + POSTING_READ(dspbase_reg); intel_wait_for_vblank(dev, intel_crtc->pipe); + }
I915_WRITE(pipeconf_reg, pipeconf & ~PIPEACONF_ENABLE); + POSTING_READ(pipeconf_reg); /* Wait for vblank for the disable to take effect. */ intel_wait_for_vblank(dev, intel_crtc->pipe);
@@ -1268,11 +1271,15 @@ intel_tv_detect_type (struct intel_tv *intel_tv) DAC_C_0_7_V); I915_WRITE(TV_CTL, tv_ctl); I915_WRITE(TV_DAC, tv_dac); + POSTING_READ(TV_DAC); intel_wait_for_vblank(dev, intel_crtc->pipe); + tv_dac = I915_READ(TV_DAC); I915_WRITE(TV_DAC, save_tv_dac); I915_WRITE(TV_CTL, save_tv_ctl); + POSTING_READ(TV_CTL); intel_wait_for_vblank(dev, intel_crtc->pipe); + /* * A B C * 0 1 1 Composite