On Wed, 2019-03-27 at 17:19 +0800, wangyan wang wrote:
From: chunhui dai chunhui.dai@mediatek.com
Recalculate the rate of this clock, by querying hardware.
You just describe _WHAT_ do you do here, I would like you to describe _WHT_ do you do here. I think this patch is to make implementation of recalc_rate() to match the definition.
Signed-off-by: chunhui dai chunhui.dai@mediatek.com Signed-off-by: wangyan wang wangyan.wang@mediatek.com
drivers/gpu/drm/mediatek/mtk_hdmi_phy.c | 7 ++---- drivers/gpu/drm/mediatek/mtk_hdmi_phy.h | 3 +-- drivers/gpu/drm/mediatek/mtk_mt2701_hdmi_phy.c | 33 ++++++++++++++++++++++++++ drivers/gpu/drm/mediatek/mtk_mt8173_hdmi_phy.c | 8 +++++++ 4 files changed, 44 insertions(+), 7 deletions(-)
diff --git a/drivers/gpu/drm/mediatek/mtk_hdmi_phy.c b/drivers/gpu/drm/mediatek/mtk_hdmi_phy.c index 4ef9c57ffd44..13c5e65b9ead 100644 --- a/drivers/gpu/drm/mediatek/mtk_hdmi_phy.c +++ b/drivers/gpu/drm/mediatek/mtk_hdmi_phy.c @@ -29,12 +29,9 @@ long mtk_hdmi_pll_round_rate(struct clk_hw *hw, unsigned long rate, return rate; }
-unsigned long mtk_hdmi_pll_recalc_rate(struct clk_hw *hw,
unsigned long parent_rate)+u32 mtk_hdmi_phy_read(struct mtk_hdmi_phy *hdmi_phy, u32 offset) {
- struct mtk_hdmi_phy *hdmi_phy = to_mtk_hdmi_phy(hw);
- return hdmi_phy->pll_rate;
- return readl(hdmi_phy->regs + offset);
}
This function is useless, so remove it.
Regards, CK
void mtk_hdmi_phy_clear_bits(struct mtk_hdmi_phy *hdmi_phy, u32 offset, diff --git a/drivers/gpu/drm/mediatek/mtk_hdmi_phy.h b/drivers/gpu/drm/mediatek/mtk_hdmi_phy.h index f39b1fc66612..fdad8b17a915 100644 --- a/drivers/gpu/drm/mediatek/mtk_hdmi_phy.h +++ b/drivers/gpu/drm/mediatek/mtk_hdmi_phy.h @@ -41,6 +41,7 @@ struct mtk_hdmi_phy { unsigned int ibias_up; };
+u32 mtk_hdmi_phy_read(struct mtk_hdmi_phy *hdmi_phy, u32 offset); void mtk_hdmi_phy_clear_bits(struct mtk_hdmi_phy *hdmi_phy, u32 offset, u32 bits); void mtk_hdmi_phy_set_bits(struct mtk_hdmi_phy *hdmi_phy, u32 offset, @@ -50,8 +51,6 @@ void mtk_hdmi_phy_mask(struct mtk_hdmi_phy *hdmi_phy, u32 offset, struct mtk_hdmi_phy *to_mtk_hdmi_phy(struct clk_hw *hw); long mtk_hdmi_pll_round_rate(struct clk_hw *hw, unsigned long rate, unsigned long *parent_rate); -unsigned long mtk_hdmi_pll_recalc_rate(struct clk_hw *hw,
unsigned long parent_rate);extern struct platform_driver mtk_hdmi_phy_driver; extern struct mtk_hdmi_phy_conf mtk_hdmi_phy_8173_conf; diff --git a/drivers/gpu/drm/mediatek/mtk_mt2701_hdmi_phy.c b/drivers/gpu/drm/mediatek/mtk_mt2701_hdmi_phy.c index fcc42dc6ea7f..9dcf9c2ff37a 100644 --- a/drivers/gpu/drm/mediatek/mtk_mt2701_hdmi_phy.c +++ b/drivers/gpu/drm/mediatek/mtk_mt2701_hdmi_phy.c @@ -153,6 +153,39 @@ static int mtk_hdmi_pll_set_rate(struct clk_hw *hw, unsigned long rate, RG_HDMITX_DRV_IBIAS_MASK); return 0; } +static unsigned long mtk_hdmi_pll_recalc_rate(struct clk_hw *hw,
unsigned long parent_rate)+{
- struct mtk_hdmi_phy *hdmi_phy = to_mtk_hdmi_phy(hw);
- unsigned long out_rate, val;
- val = (readl(hdmi_phy->regs + HDMI_CON6)
& RG_HTPLL_PREDIV_MASK) >> RG_HTPLL_PREDIV;- switch (val) {
- case 0x00:
out_rate = parent_rate;break;- case 0x01:
out_rate = parent_rate / 2;break;- default:
out_rate = parent_rate / 4;break;- }
- val = (readl(hdmi_phy->regs + HDMI_CON6)
& RG_HTPLL_FBKDIV_MASK) >> RG_HTPLL_FBKDIV;- out_rate *= (val + 1) * 2;
- val = (readl(hdmi_phy->regs + HDMI_CON2)
& RG_HDMITX_TX_POSDIV_MASK);- out_rate >>= (val >> RG_HDMITX_TX_POSDIV);
- if (readl(hdmi_phy->regs + HDMI_CON2) & RG_HDMITX_EN_TX_POSDIV)
out_rate = out_rate / 5;- return out_rate;
+}
static const struct clk_ops mtk_hdmi_phy_pll_ops = { .prepare = mtk_hdmi_pll_prepare, diff --git a/drivers/gpu/drm/mediatek/mtk_mt8173_hdmi_phy.c b/drivers/gpu/drm/mediatek/mtk_mt8173_hdmi_phy.c index ed5916b27658..cb23c1e4692a 100644 --- a/drivers/gpu/drm/mediatek/mtk_mt8173_hdmi_phy.c +++ b/drivers/gpu/drm/mediatek/mtk_mt8173_hdmi_phy.c @@ -285,6 +285,14 @@ static int mtk_hdmi_pll_set_rate(struct clk_hw *hw, unsigned long rate, return 0; }
+static unsigned long mtk_hdmi_pll_recalc_rate(struct clk_hw *hw,
unsigned long parent_rate)+{
- struct mtk_hdmi_phy *hdmi_phy = to_mtk_hdmi_phy(hw);
- return hdmi_phy->pll_rate;
+}
static const struct clk_ops mtk_hdmi_phy_pll_ops = { .prepare = mtk_hdmi_pll_prepare, .unprepare = mtk_hdmi_pll_unprepare,