On 01/03/16 16:20, Philipp Zabel wrote:
From: CK Hu ck.hu@mediatek.com
This patch adds the device nodes for the DISP function blocks comprising the display subsystem.
Signed-off-by: CK Hu ck.hu@mediatek.com Signed-off-by: Cawa Cheng cawa.cheng@mediatek.com Signed-off-by: Jie Qiu jie.qiu@mediatek.com Signed-off-by: Daniel Kurtz djkurtz@chromium.org Signed-off-by: Philipp Zabel p.zabel@pengutronix.de
Changes since v10:
- reordered nodes by address
arch/arm64/boot/dts/mediatek/mt8173.dtsi | 235 +++++++++++++++++++++++++++++++ 1 file changed, 235 insertions(+)
diff --git a/arch/arm64/boot/dts/mediatek/mt8173.dtsi b/arch/arm64/boot/dts/mediatek/mt8173.dtsi index 8048811..4ff666d 100644 --- a/arch/arm64/boot/dts/mediatek/mt8173.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8173.dtsi @@ -26,6 +26,23 @@ #address-cells = <2>; #size-cells = <2>;
- aliases {
ovl0 = &ovl0;
ovl1 = &ovl1;
rdma0 = &rdma0;
rdma1 = &rdma1;
rdma2 = &rdma2;
wdma0 = &wdma0;
wdma1 = &wdma1;
color0 = &color0;
color1 = &color1;
split0 = &split0;
split1 = &split1;
dpi0 = &dpi0;
dsi0 = &dsi0;
dsi1 = &dsi1;
- };
- cpus { #address-cells = <1>; #size-cells = <0>;
@@ -295,6 +312,26 @@ #clock-cells = <1>; };
mipi_tx0: mipi-dphy@10215000 {
compatible = "mediatek,mt8173-mipi-tx";
reg = <0 0x10215000 0 0x1000>;
clocks = <&clk26m>;
clock-output-names = "mipi_tx0_pll";
#clock-cells = <0>;
#phy-cells = <0>;
status = "disabled";
};
mipi_tx1: mipi-dphy@10216000 {
compatible = "mediatek,mt8173-mipi-tx";
reg = <0 0x10216000 0 0x1000>;
clocks = <&clk26m>;
clock-output-names = "mipi_tx1_pll";
#clock-cells = <0>;
#phy-cells = <0>;
status = "disabled";
};
- gic: interrupt-controller@10220000 { compatible = "arm,gic-400"; #interrupt-cells = <3>;
@@ -441,6 +478,14 @@ status = "disabled"; };
hdmiddc0: i2c@11012000 {
compatible = "mediatek,mt8173-hdmi-ddc";
interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_LOW>;
reg = <0 0x11012000 0 0x1C>;
clocks = <&pericfg CLK_PERI_I2C5>;
clock-names = "ddc-i2c";
};
- i2c6: i2c@11013000 { compatible = "mediatek,mt8173-i2c"; reg = <0 0x11013000 0 0x70>,
@@ -576,7 +621,183 @@ mmsys: clock-controller@14000000 { compatible = "mediatek,mt8173-mmsys", "syscon"; reg = <0 0x14000000 0 0x1000>;
power-domains = <&scpsys MT8173_POWER_DOMAIN_MM>; #clock-cells = <1>;
/* FIXME - remove iommus here */
iommus = <&iommu M4U_PORT_DISP_OVL0>,
<&iommu M4U_PORT_DISP_OVL1>;
};
Do we need this iommus? Sorry I wasn't able to follow this series, but it looks suspicious here :)
Regards, Matthias