On Mon, 16 Jun 2014, Boris BREZILLON wrote:
On 16/06/2014 14:50, Lee Jones wrote:
The HLCDC IP available on some Atmel SoCs (i.e. at91sam9n12, at91sam9x5 family or sama5d3 family) exposes 2 subdevices:
- a display controller (controlled by a DRM driver)
- a PWM chip
Add support for the MFD device which will just retrieve HLCDC clocks and create a regmap so that subdevices can access the HLCDC register range concurrently.
Signed-off-by: Boris BREZILLON boris.brezillon@free-electrons.com
.../devicetree/bindings/mfd/atmel-hlcdc.txt | 41 ++++++++ drivers/mfd/Kconfig | 11 ++ drivers/mfd/Makefile | 1 + drivers/mfd/atmel-hlcdc.c | 116 +++++++++++++++++++++ include/linux/mfd/atmel-hlcdc.h | 78 ++++++++++++++ 5 files changed, 247 insertions(+) create mode 100644 Documentation/devicetree/bindings/mfd/atmel-hlcdc.txt create mode 100644 drivers/mfd/atmel-hlcdc.c create mode 100644 include/linux/mfd/atmel-hlcdc.h diff --git a/Documentation/devicetree/bindings/mfd/atmel-hlcdc.txt b/Documentation/devicetree/bindings/mfd/atmel-hlcdc.txt new file mode 100644 index 0000000..f5b69cb --- /dev/null +++ b/Documentation/devicetree/bindings/mfd/atmel-hlcdc.txt
[...]
hlcdc-display-controller {
compatible = "atmel,hlcdc-dc";
interrupts = <36 IRQ_TYPE_LEVEL_HIGH 0>;
I assume you're using the 3rd parameter for flags. If so, please use the defines.
No, the third parameter encodes the irq priority (from 0 to 7 IIRC).
Ah okay. Can you point me to the documentation for this IRQ controller please? I'd like to have a quick peek. It might be worth defining the priority to prevent confusion, also you definitely should document it in your binding.
[...]
+static struct platform_driver atmel_hlcdc_driver = {
- .probe = atmel_hlcdc_probe,
- .remove = atmel_hlcdc_remove,
- .driver = {
.name = "atmel-hlcdc",
.owner = THIS_MODULE,
.of_match_table = atmel_hlcdc_match,
Is this driver DT only?
Yes it is.
So it should depend on OF in the Kconfig entry.