Am Donnerstag, den 31.05.2012, 18:54 -0400 schrieb alexdeucher@gmail.com:
From: Alex Deucher alexander.deucher@amd.com
Need to program an additional VM register. This doesn't not currently cause any problems, but allows us to program the proper backend map in a subsequent patch which should improve performance on these asics.
Signed-off-by: Alex Deucher alexander.deucher@amd.com Cc: stable@vger.kernel.org
drivers/gpu/drm/radeon/evergreen.c | 5 +++++ drivers/gpu/drm/radeon/evergreend.h | 1 + drivers/gpu/drm/radeon/rv770.c | 2 ++ drivers/gpu/drm/radeon/rv770d.h | 1 + 4 files changed, 9 insertions(+), 0 deletions(-)
diff --git a/drivers/gpu/drm/radeon/evergreen.c b/drivers/gpu/drm/radeon/evergreen.c index 5d9c2c6..0408ac2 100644 --- a/drivers/gpu/drm/radeon/evergreen.c +++ b/drivers/gpu/drm/radeon/evergreen.c @@ -1029,6 +1029,11 @@ int evergreen_pcie_gart_enable(struct radeon_device *rdev) WREG32(MC_VM_MD_L1_TLB0_CNTL, tmp); WREG32(MC_VM_MD_L1_TLB1_CNTL, tmp); WREG32(MC_VM_MD_L1_TLB2_CNTL, tmp);
if ((rdev->family == CHIP_JUNIPER) ||(rdev->family == CHIP_CYPRESS) ||(rdev->family == CHIP_HEMLOCK) ||
Is rv740 in the commit summary Hemlock?
(rdev->family == CHIP_BARTS))WREG32(MC_VM_MD_L1_TLB3_CNTL, tmp);
[…]
Thanks,
Paul