On 31/05/2021 16:33, Rajeev Nandan wrote:
The SC7280 SoC uses the 7nm (V4.1) DSI PHY driver with different enable|disable regulator loads.
Signed-off-by: Rajeev Nandan rajeevny@codeaurora.org
drivers/gpu/drm/msm/Kconfig | 6 +++--- drivers/gpu/drm/msm/dsi/phy/dsi_phy.c | 2 ++ drivers/gpu/drm/msm/dsi/phy/dsi_phy.h | 1 + drivers/gpu/drm/msm/dsi/phy/dsi_phy_7nm.c | 22 ++++++++++++++++++++++ 4 files changed, 28 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/msm/Kconfig b/drivers/gpu/drm/msm/Kconfig index 10f693e..7c9d9f1 100644 --- a/drivers/gpu/drm/msm/Kconfig +++ b/drivers/gpu/drm/msm/Kconfig @@ -114,9 +114,9 @@ config DRM_MSM_DSI_10NM_PHY Choose this option if DSI PHY on SDM845 is used on the platform.
config DRM_MSM_DSI_7NM_PHY
- bool "Enable DSI 7nm PHY driver in MSM DRM (used by SM8150/SM8250)"
- bool "Enable DSI 7nm PHY driver in MSM DRM" depends on DRM_MSM_DSI default y help
Choose this option if DSI PHY on SM8150/SM8250 is used on the
platform.
Choose this option if DSI PHY on SM8150/SM8250/SC7280 is used on
the platform.
diff --git a/drivers/gpu/drm/msm/dsi/phy/dsi_phy.c b/drivers/gpu/drm/msm/dsi/phy/dsi_phy.c index ff7f2ec..2770783 100644 --- a/drivers/gpu/drm/msm/dsi/phy/dsi_phy.c +++ b/drivers/gpu/drm/msm/dsi/phy/dsi_phy.c @@ -593,6 +593,8 @@ static const struct of_device_id dsi_phy_dt_match[] = { .data = &dsi_phy_7nm_cfgs }, { .compatible = "qcom,dsi-phy-7nm-8150", .data = &dsi_phy_7nm_8150_cfgs },
- { .compatible = "qcom,dsi-phy-7nm-7280",
#endif {} };.data = &dsi_phy_7nm_7280_cfgs },
diff --git a/drivers/gpu/drm/msm/dsi/phy/dsi_phy.h b/drivers/gpu/drm/msm/dsi/phy/dsi_phy.h index 94a77ac..bc91dc8 100644 --- a/drivers/gpu/drm/msm/dsi/phy/dsi_phy.h +++ b/drivers/gpu/drm/msm/dsi/phy/dsi_phy.h @@ -51,6 +51,7 @@ extern const struct msm_dsi_phy_cfg dsi_phy_10nm_cfgs; extern const struct msm_dsi_phy_cfg dsi_phy_10nm_8998_cfgs; extern const struct msm_dsi_phy_cfg dsi_phy_7nm_cfgs; extern const struct msm_dsi_phy_cfg dsi_phy_7nm_8150_cfgs; +extern const struct msm_dsi_phy_cfg dsi_phy_7nm_7280_cfgs;
struct msm_dsi_dphy_timing { u32 clk_zero; diff --git a/drivers/gpu/drm/msm/dsi/phy/dsi_phy_7nm.c b/drivers/gpu/drm/msm/dsi/phy/dsi_phy_7nm.c index e76ce40..6e30d21 100644 --- a/drivers/gpu/drm/msm/dsi/phy/dsi_phy_7nm.c +++ b/drivers/gpu/drm/msm/dsi/phy/dsi_phy_7nm.c @@ -998,3 +998,25 @@ const struct msm_dsi_phy_cfg dsi_phy_7nm_8150_cfgs = { .io_start = { 0xae94400, 0xae96400 }, .num_dsi_phy = 2, };
+const struct msm_dsi_phy_cfg dsi_phy_7nm_7280_cfgs = {
- .has_phy_lane = true,
- .reg_cfg = {
.num = 1,
.regs = {
{"vdds", 37550, 0},
},
- },
- .ops = {
.enable = dsi_7nm_phy_enable,
.disable = dsi_7nm_phy_disable,
.pll_init = dsi_pll_7nm_init,
.save_pll_state = dsi_7nm_pll_save_state,
.restore_pll_state = dsi_7nm_pll_restore_state,
- },
- .min_pll_rate = 600000000UL,
- .max_pll_rate = (5000000000ULL < ULONG_MAX) ? 5000000000ULL : ULONG_MAX,
Could you please follow the patch by Arnd here? https://lore.kernel.org/linux-arm-msm/20210514213032.575161-1-arnd@kernel.or...
- .io_start = { 0xae94400, 0xae96400 },
- .num_dsi_phy = 2,
Judging from the next patch, you have one DSI host and one DSI PHY. Could you please correct io_start / num_dsi_phy here?
- .quirks = DSI_PHY_7NM_QUIRK_V4_1,
+};
With these two issues fixed:
Reviewed-by: Dmitry Baryshkov dmitry.baryshkov@linaro.org