On Tue, May 20, 2014 at 07:31:33PM +0200, Daniel Vetter wrote:
On Tue, May 20, 2014 at 05:20:05PM +0300, ville.syrjala@linux.intel.com wrote:
From: Ville Syrjälä ville.syrjala@linux.intel.com
If a pipe is already active when we init/resume there might not be a full modeset afterwards so drm_vblank_on() may not get called. In such a case if someone is holding a vblank reference across a suspend/resume cycle drm_vblank_get() called after resuming won't re-enable the vblank interrupts.
So in order to make sure vblank interrupts get re-enabled post-resume, call drm_vblank_on() in intel_sanitize_crtc() if the crtc is already active.
v2: Also drm_vblank_off() if the pipe got disabled magically
Signed-off-by: Ville Syrjälä ville.syrjala@linux.intel.com
This seems to duct-tape over the funny failure I'm seeing on my snb where kms_flip/vblank-vs-modeset|dpms-suspend work nicely, but kms_flip/vblank-vs-suspend has some totally hilarious random vblank frame counter after the modeset.
Testecase: igt/kms_flip/vblank-vs-suspend Tested-by: Daniel Vetter daniel.vetter@ffwll.ch
Now the problem I have: We already call this in the crtc_enable hook. Why does calling this here again add the necessary magic?
/me has no clue
Well, we can figure this out later.
Queued for -next, thanks for the patch. -Daniel
Cheers, Daniel
drivers/gpu/drm/i915/intel_display.c | 6 ++++++ 1 file changed, 6 insertions(+)
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index 9420f4f..2e9f0b0 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -11708,6 +11708,12 @@ static void intel_sanitize_crtc(struct intel_crtc *crtc) reg = PIPECONF(crtc->config.cpu_transcoder); I915_WRITE(reg, I915_READ(reg) & ~PIPECONF_FRAME_START_DELAY_MASK);
- /* restore vblank interrupts to correct state */
- if (crtc->active)
drm_vblank_on(dev, crtc->pipe);- else
drm_vblank_off(dev, crtc->pipe);- /* We need to sanitize the plane -> pipe mapping first because this will
- disable the crtc (and hence change the state) if it is wrong. Note
- that gen4+ has a fixed plane -> pipe mapping. */
-- 1.8.5.5
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-- Daniel Vetter Software Engineer, Intel Corporation +41 (0) 79 365 57 48 - http://blog.ffwll.ch