On Thu, Jul 18, 2019 at 05:50:41PM +0300, Ville Syrjala wrote:
From: Ville Syrjälä ville.syrjala@linux.intel.com
I was playing around with YCbCr 4:4:4 output and noticed several things wrong in our code. So I fixed it all and tossed in the prep work for YCbCr 4:4:4 output on ilk+.
Ville Syrjälä (12): drm/dp: Add definitons for MSA MISC bits
^ pushed to drm-misc-next
drm/i915: Switch to using DP_MSA_MISC_* defines
^ on hold until the first patch propagates to dinq.
drm/i915: Fix HSW+ DP MSA YCbCr colorspace indication drm/i915: Fix AVI infoframe quantization range for YCbCr output drm/i915: Extract intel_hdmi_limited_color_range() drm/i915: Never set limited_color_range=true for YCbCr output drm/i915: Don't look at unrelated PIPECONF bits for interlaced readout drm/i915: Simplify intel_get_crtc_ycbcr_config() drm/i915: Add PIPECONF YCbCr 4:4:4 programming for HSW drm/i915: Document ILK+ pipe csc matrix better drm/i915: Set up ILK/SNB csc unit properly for YCbCr output drm/i915: Add PIPECONF YCbCr 4:4:4 programming for ILK-IVB
The rest pushed to dinq, with typos fixed. Thanks for the review.
drivers/gpu/drm/i915/display/intel_color.c | 51 ++++++-- drivers/gpu/drm/i915/display/intel_ddi.c | 28 +++-- drivers/gpu/drm/i915/display/intel_display.c | 120 ++++++++++++------- drivers/gpu/drm/i915/display/intel_dp.c | 10 ++ drivers/gpu/drm/i915/display/intel_hdmi.c | 61 +++++++--- drivers/gpu/drm/i915/i915_reg.h | 31 ++--- include/drm/drm_dp_helper.h | 42 +++++++ 7 files changed, 247 insertions(+), 96 deletions(-)
-- 2.21.0