The issue was that spurious interrupts were happening before the LCD controller was enabled and system hangs. Fix is to clear LCD interrupts and disable them before modeset and re enable them after enabling LCD controller.
v2: upclassed dev_private
Signed-off-by: Anitha Chrisanthus anitha.chrisanthus@intel.com Reviewed-by: Bob Paauwe bob.j.paauwe@intel.com --- drivers/gpu/drm/kmb/kmb_crtc.c | 12 +++++++++--- drivers/gpu/drm/kmb/kmb_drv.c | 21 +++------------------ 2 files changed, 12 insertions(+), 21 deletions(-)
diff --git a/drivers/gpu/drm/kmb/kmb_crtc.c b/drivers/gpu/drm/kmb/kmb_crtc.c index 589a841..c390bbe 100644 --- a/drivers/gpu/drm/kmb/kmb_crtc.c +++ b/drivers/gpu/drm/kmb/kmb_crtc.c @@ -78,6 +78,7 @@ static void kmb_crtc_mode_set_nofb(struct drm_crtc *crtc) int vsync_start_offset; int vsync_end_offset; struct kmb_drm_private *dev_p = to_kmb(dev); + unsigned int val = 0;
/* initialize mipi */ kmb_dsi_hw_init(dev, m); @@ -88,6 +89,9 @@ static void kmb_crtc_mode_set_nofb(struct drm_crtc *crtc) m->crtc_hsync_start - m->crtc_hdisplay, m->crtc_htotal - m->crtc_hsync_end, m->crtc_hsync_end - m->crtc_hsync_start); + val = kmb_read_lcd(dev_p, LCD_INT_ENABLE); + kmb_clr_bitmask_lcd(dev_p, LCD_INT_ENABLE, val); + kmb_set_bitmask_lcd(dev_p, LCD_INT_CLEAR, ~0x0); // vm.vfront_porch = m->crtc_vsync_start - m->crtc_vdisplay; vm.vfront_porch = 2; // vm.vback_porch = m->crtc_vtotal - m->crtc_vsync_end; @@ -136,9 +140,9 @@ static void kmb_crtc_mode_set_nofb(struct drm_crtc *crtc) kmb_write_lcd(dev_p, LCD_VSYNC_START_EVEN, 10); kmb_write_lcd(dev_p, LCD_VSYNC_END_EVEN, 10); } - /* enable VL1 layer as default */ kmb_write_lcd(dev_p, LCD_TIMING_GEN_TRIG, ENABLE); kmb_set_bitmask_lcd(dev_p, LCD_CONTROL, LCD_CTRL_ENABLE); + kmb_set_bitmask_lcd(dev_p, LCD_INT_ENABLE, val); #endif /* TBD */ /* set clocks here */ @@ -170,8 +174,9 @@ static void kmb_crtc_atomic_begin(struct drm_crtc *crtc, struct drm_crtc_state *state) { struct drm_device *dev = crtc->dev; + struct kmb_drm_private *dev_p = to_kmb(dev);
- kmb_clr_bitmask_lcd(dev->dev_private, LCD_INT_ENABLE, + kmb_clr_bitmask_lcd(dev_p, LCD_INT_ENABLE, LCD_INT_VERT_COMP); }
@@ -179,8 +184,9 @@ static void kmb_crtc_atomic_flush(struct drm_crtc *crtc, struct drm_crtc_state *state) { struct drm_device *dev = crtc->dev; + struct kmb_drm_private *dev_p = to_kmb(dev);
- kmb_set_bitmask_lcd(dev->dev_private, LCD_INT_ENABLE, + kmb_set_bitmask_lcd(dev_p, LCD_INT_ENABLE, LCD_INT_VERT_COMP);
spin_lock_irq(&crtc->dev->event_lock); diff --git a/drivers/gpu/drm/kmb/kmb_drv.c b/drivers/gpu/drm/kmb/kmb_drv.c index e6aa32c..308036e 100644 --- a/drivers/gpu/drm/kmb/kmb_drv.c +++ b/drivers/gpu/drm/kmb/kmb_drv.c @@ -37,8 +37,6 @@ static irqreturn_t kmb_isr(int irq, void *arg);
static struct clk *clk_lcd; static struct clk *clk_mipi; -static struct clk *clk_msscam; -static struct clk *clk_pll0out0; static struct clk *clk_mipi_ecfg; static struct clk *clk_mipi_cfg;
@@ -59,12 +57,6 @@ int kmb_display_clk_enable(void) DRM_ERROR("Failed to enable MIPI clock: %d\n", ret); return ret; } -/* ret = clk_prepare_enable(clk_msscam); - if (ret) { - DRM_ERROR("Failed to enable MSSCAM clock: %d\n", ret); - return ret; - } - */
ret = clk_prepare_enable(clk_mipi_ecfg); if (ret) { @@ -87,8 +79,6 @@ static int kmb_display_clk_disable(void) clk_disable_unprepare(clk_lcd); if (clk_mipi) clk_disable_unprepare(clk_mipi); - if (clk_msscam) - clk_disable_unprepare(clk_msscam); if (clk_mipi_ecfg) clk_disable_unprepare(clk_mipi_ecfg); if (clk_mipi_cfg) @@ -180,14 +170,6 @@ static int kmb_load(struct drm_device *drm, unsigned long flags) DRM_ERROR("clk_get() failed clk_mipi\n"); goto setup_fail; } - clk_pll0out0 = clk_get(&pdev->dev, "clk_pll0_out0"); - if (IS_ERR(clk_pll0out0)) - DRM_ERROR("clk_get() failed clk_pll0_out0\n"); - - if (clk_pll0out0) - DRM_INFO("Get clk_pll0out0 = %ld\n", - clk_get_rate(clk_pll0out0)); - clk_mipi_ecfg = clk_get(&pdev->dev, "clk_mipi_ecfg"); if (IS_ERR(clk_mipi_ecfg)) { DRM_ERROR("clk_get() failed clk_mipi_ecfg\n"); @@ -394,6 +376,9 @@ static irqreturn_t handle_lcd_irq(struct drm_device *dev) break; } } + + /* clear all interrupts */ + kmb_set_bitmask_lcd(dev->dev_private, LCD_INT_CLEAR, ~0x0); return IRQ_HANDLED; }