On Mon, Mar 03, 2014 at 01:08:58PM -0600, Felipe Balbi wrote:
From: Darren Etheridge detheridge@ti.com
1680x1050 appears to also be within the bandwidth capabilities of the device and memory infrastructure.
Signed-off-by: Darren Etheridge detheridge@ti.com
ping
drivers/gpu/drm/tilcdc/tilcdc_drv.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/tilcdc/tilcdc_drv.h b/drivers/gpu/drm/tilcdc/tilcdc_drv.h index 5bb64e3..b47ec24 100644 --- a/drivers/gpu/drm/tilcdc/tilcdc_drv.h +++ b/drivers/gpu/drm/tilcdc/tilcdc_drv.h @@ -43,7 +43,7 @@
- with optimized DDR & EMIF settings tweaked 1920x1080@24 appears to
- be supportable
*/ -#define TILCDC_DEFAULT_MAX_BANDWIDTH (1280*1024*60) +#define TILCDC_DEFAULT_MAX_BANDWIDTH (1680*1050*60)
struct tilcdc_drm_private {
1.9.0
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