On Wed, Jun 07, 2017 at 04:46:16PM +0200, Hans Verkuil wrote:
From: Hans Verkuil hans.verkuil@cisco.com
The Odroid-U3 board has an IP4791CZ12 level shifter that is disabled if the HPD is low, which means that the CEC pin is disabled as well.
Signed-off-by: Hans Verkuil hans.verkuil@cisco.com Cc: Krzysztof Kozlowski krzk@kernel.org Cc: Andrzej Hajda a.hajda@samsung.com Cc: devicetree@vger.kernel.org
arch/arm/boot/dts/exynos4412-odroidu3.dts | 4 ++++ 1 file changed, 4 insertions(+)
diff --git a/arch/arm/boot/dts/exynos4412-odroidu3.dts b/arch/arm/boot/dts/exynos4412-odroidu3.dts index 7504a5aa538e..7209cb48fc2a 100644 --- a/arch/arm/boot/dts/exynos4412-odroidu3.dts +++ b/arch/arm/boot/dts/exynos4412-odroidu3.dts @@ -131,3 +131,7 @@ cs-gpios = <&gpb 5 GPIO_ACTIVE_HIGH>; status = "okay"; };
+&hdmicec {
- needs-hpd;
+};
All good, except we try to keep them sorted alphabetically (helps avoiding conflicts and makes things easier to find)... which for this particular file will be difficult as it is semi-sorted. :) Anyway, how about putting this new node after &buck?
Best regards, Krzysztof