In the SoC before, such as mt8173, it has 2 pipelines binding to one mmsys with the same clock driver and the same power domain.
In mt8195, there are 4 pipelines binding to 4 different mmsys, such as vdosys0, vdosys1, vppsys0 and vppsys1. Each mmsys uses different clock drivers and different power domain.
Since each mmsys has its own mmio base address, they could be identified by their different address during probe time.
Signed-off-by: jason-jh.lin jason-jh.lin@mediatek.com Reviewed-by: CK Hu ck.hu@mediatek.com Reviewed-by: AngeloGioacchino Del Regno angelogioacchino.delregno@collabora.com --- .../devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml | 1 + 1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml b/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml index 6c2c3edcd443..6ad023eec193 100644 --- a/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml +++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml @@ -31,6 +31,7 @@ properties: - mediatek,mt8183-mmsys - mediatek,mt8186-mmsys - mediatek,mt8192-mmsys + - mediatek,mt8195-mmsys - mediatek,mt8365-mmsys - const: syscon - items: