On Thu, Oct 18, 2018 at 4:31 AM Laurent Pinchart laurent.pinchart@ideasonboard.com wrote:
Given that the tolerance is a property of the panel or bridge, I agree with Daniel that it should be implemented there, or at least in cooperation with drm_panel and drm_bridge.
Clock tolerance is not specified in ANX6345 datasheet.
Semi-related information, I think the CEA and VESA standards allow a 0.5% clock tolerance. What is the maximum clock frequency deviation required for this platform ?
This particular platform requires ~1% deviation.
E.g. on Pinebook with 768p panel: requested clock: 73.0 MHz, real clock: 72.296296 MHz (0.96%) on Pinebook with 1080p panel: requested clock: 138.5 MHz, real clock: 138.461538 MHz (0.03%)
So unfortunately 0.5% is not enough.
Regards, Vasily