Hi, Yongqiang:
On Thu, 2019-08-29 at 22:50 +0800, yongqiang.niu@mediatek.com wrote:
From: Yongqiang Niu yongqiang.niu@mediatek.com
This patch add support for mediatek SOC MT8183 1.ovl_2l share driver with ovl 2.rdma1 share drive with rdma0, but fifo size is different 3.add mt8183 mutex private data, and mmsys private data 4.add mt8183 main and external path module for crtc create
Signed-off-by: Yongqiang Niu yongqiang.niu@mediatek.com
drivers/gpu/drm/mediatek/mtk_disp_ovl.c | 18 +++++++++ drivers/gpu/drm/mediatek/mtk_disp_rdma.c | 27 ++++++++++++- drivers/gpu/drm/mediatek/mtk_drm_ddp.c | 69 ++++++++++++++++++++++++++++++++ drivers/gpu/drm/mediatek/mtk_drm_ddp.h | 1 + drivers/gpu/drm/mediatek/mtk_drm_drv.c | 47 ++++++++++++++++++++++ 5 files changed, 161 insertions(+), 1 deletion(-)
[snip]
diff --git a/drivers/gpu/drm/mediatek/mtk_disp_rdma.c b/drivers/gpu/drm/mediatek/mtk_disp_rdma.c index 9a6f0a2..24945fe 100644 --- a/drivers/gpu/drm/mediatek/mtk_disp_rdma.c +++ b/drivers/gpu/drm/mediatek/mtk_disp_rdma.c @@ -62,6 +62,7 @@ struct mtk_disp_rdma { struct mtk_ddp_comp ddp_comp; struct drm_crtc *crtc; const struct mtk_disp_rdma_data *data;
- u32 fifo_size;
};
static inline struct mtk_disp_rdma *comp_to_rdma(struct mtk_ddp_comp *comp) @@ -130,10 +131,16 @@ static void mtk_rdma_config(struct mtk_ddp_comp *comp, unsigned int width, unsigned int threshold; unsigned int reg; struct mtk_disp_rdma *rdma = comp_to_rdma(comp);
u32 rdma_fifo_size;
rdma_update_bits(comp, DISP_REG_RDMA_SIZE_CON_0, 0xfff, width); rdma_update_bits(comp, DISP_REG_RDMA_SIZE_CON_1, 0xfffff, height);
if (rdma->fifo_size)
rdma_fifo_size = rdma->fifo_size;
else
rdma_fifo_size = RDMA_FIFO_SIZE(rdma);
I think the fifo size part should be an independent patch because it has no strong relation with MT8183.
- /*
- Enable FIFO underflow since DSI and DPI can't be blocked.
- Keep the FIFO pseudo size reset default of 8 KiB. Set the
@@ -142,7 +149,7 @@ static void mtk_rdma_config(struct mtk_ddp_comp *comp, unsigned int width, */ threshold = width * height * vrefresh * 4 * 7 / 1000000; reg = RDMA_FIFO_UNDERFLOW_EN |
RDMA_FIFO_PSEUDO_SIZE(RDMA_FIFO_SIZE(rdma)) |
writel(reg, comp->regs + DISP_REG_RDMA_FIFO_CON);RDMA_FIFO_PSEUDO_SIZE(rdma_fifo_size) | RDMA_OUTPUT_VALID_FIFO_THRESHOLD(threshold);
} @@ -284,6 +291,18 @@ static int mtk_disp_rdma_probe(struct platform_device *pdev) return comp_id; }
- if (of_find_property(dev->of_node, "mediatek,rdma_fifo_size", &ret)) {
ret = of_property_read_u32(dev->of_node,
"mediatek,rdma_fifo_size",
&priv->fifo_size);
if (ret) {
dev_err(dev, "Failed to get rdma fifo size\n");
return ret;
}
priv->fifo_size *= SZ_1K;
- }
- ret = mtk_ddp_comp_init(dev, dev->of_node, &priv->ddp_comp, comp_id, &mtk_disp_rdma_funcs); if (ret) {
@@ -328,11 +347,17 @@ static int mtk_disp_rdma_remove(struct platform_device *pdev) .fifo_size = SZ_8K, };
[snip]
@@ -514,6 +558,7 @@ static int mtk_drm_probe(struct platform_device *pdev) */ if (comp_type == MTK_DISP_COLOR || comp_type == MTK_DISP_OVL ||
comp_type == MTK_DISP_OVL_2L ||
I think this should be squashed into "[v5,15/32] drm/mediatek: add commponent OVL_2L0'.
Regards, CK
comp_type == MTK_DISP_RDMA || comp_type == MTK_DSI || comp_type == MTK_DPI) {