From: Nishad Saraf nishad.saraf@xilinx.com
Platform management services like device control, resets, power management, etc. are provided by Platform, Loader and Manager(PLM) through firmware driver APIs. For requesting some of these services, this change reads AI Engine platform management node ID from DT node. Some other features like clearing interrupts in the NoC interconnect might only be valid for particular silicon revisions. For supporting such silicon specific features, AI Engine driver will query and store this information in device instance. While at it, this change makes EEMI operations accessible to all the other source files in the driver.
Signed-off-by: Nishad Saraf nishad.saraf@xilinx.com Signed-off-by: Wendy Liang wendy.liang@xilinx.com --- drivers/misc/xilinx-ai-engine/ai-engine-dev.c | 25 +++++++++++++++++++++- drivers/misc/xilinx-ai-engine/ai-engine-internal.h | 6 ++++++ 2 files changed, 30 insertions(+), 1 deletion(-)
diff --git a/drivers/misc/xilinx-ai-engine/ai-engine-dev.c b/drivers/misc/xilinx-ai-engine/ai-engine-dev.c index 7e69ff4..78eae90 100644 --- a/drivers/misc/xilinx-ai-engine/ai-engine-dev.c +++ b/drivers/misc/xilinx-ai-engine/ai-engine-dev.c @@ -11,6 +11,7 @@ #include <linux/device.h> #include <linux/dma-mapping.h> #include <linux/file.h> +#include <linux/firmware/xlnx-zynqmp.h> #include <linux/fs.h> #include <linux/idr.h> #include <linux/list.h> @@ -25,7 +26,8 @@
#include "ai-engine-internal.h"
-#define AIE_DEV_MAX (MINORMASK + 1) +#define AIE_DEV_MAX (MINORMASK + 1) +#define VERSAL_SILICON_REV_MASK GENMASK(31, 28)
static dev_t aie_major; struct class *aie_class; @@ -318,6 +320,7 @@ static int xilinx_ai_engine_probe(struct platform_device *pdev) { struct aie_device *adev; struct device *dev; + u32 idcode, version, pm_reg[2]; int ret;
adev = devm_kzalloc(&pdev->dev, sizeof(*adev), GFP_KERNEL); @@ -345,6 +348,26 @@ static int xilinx_ai_engine_probe(struct platform_device *pdev) return ret; }
+ /* + * AI Engine platform management node ID is required for requesting + * services from firmware driver. + */ + ret = of_property_read_u32_array(pdev->dev.of_node, "power-domains", + pm_reg, ARRAY_SIZE(pm_reg)); + if (ret < 0) { + dev_err(&pdev->dev, + "Failed to read power management information\n"); + return ret; + } + adev->pm_node_id = pm_reg[1]; + + ret = zynqmp_pm_get_chipid(&idcode, &version); + if (ret < 0) { + dev_err(&pdev->dev, "Failed to get chip ID\n"); + return ret; + } + adev->version = FIELD_GET(VERSAL_SILICON_REV_MASK, idcode); + dev = &adev->dev; device_initialize(dev); dev->class = aie_class; diff --git a/drivers/misc/xilinx-ai-engine/ai-engine-internal.h b/drivers/misc/xilinx-ai-engine/ai-engine-internal.h index 131d22a..b21b7025 100644 --- a/drivers/misc/xilinx-ai-engine/ai-engine-internal.h +++ b/drivers/misc/xilinx-ai-engine/ai-engine-internal.h @@ -41,6 +41,10 @@ #define AIE_REGS_ATTR_PERM_MASK GENMASK(15, \ AIE_REGS_ATTR_PERM_SHIFT)
+/* Silicon Engineering Sample(ES) revision ID */ +#define VERSAL_ES1_REV_ID 0x0 +#define VERSAL_ES2_REV_ID 0x1 + /** * struct aie_tile_regs - contiguous range of AI engine register * within an AI engine tile @@ -173,6 +177,7 @@ struct aie_resource { * while columns are occupied by partitions. * @num_kernel_regs: number of kernel only registers range * @version: AI engine device version + * @pm_node_id: AI Engine platform management node ID */ struct aie_device { struct list_head partitions; @@ -193,6 +198,7 @@ struct aie_device { u32 row_shift; u32 num_kernel_regs; int version; + u32 pm_node_id; };
/**