From: Simon Shields simon@lineageos.org
v2 (Qiang Yu): add vender string to exynos4 mali gpu
Based off a similar commit for the Samsung Mali driver by Tobias Jakobi tjakobi@math.uni-bielefeld.de
Signed-off-by: Simon Shields simon@lineageos.org Signed-off-by: Qiang Yu yuq825@gmail.com --- arch/arm/boot/dts/exynos4.dtsi | 33 +++++++++++++++++++++++++++++++++ 1 file changed, 33 insertions(+)
diff --git a/arch/arm/boot/dts/exynos4.dtsi b/arch/arm/boot/dts/exynos4.dtsi index 909a9f2bf5be..7509671c505e 100644 --- a/arch/arm/boot/dts/exynos4.dtsi +++ b/arch/arm/boot/dts/exynos4.dtsi @@ -731,6 +731,39 @@ status = "disabled"; };
+ gpu: gpu@13000000 { + compatible = "samsung,exynos4-mali", "arm,mali-400"; + reg = <0x13000000 0x30000>; + power-domains = <&pd_g3d>; + + /* + * Propagate VPLL output clock to SCLK_G3D and + * ensure that the DIV_G3D divider is 1. + */ + assigned-clocks = <&clock CLK_MOUT_G3D1>, <&clock CLK_MOUT_G3D>, + <&clock CLK_FOUT_VPLL>, <&clock CLK_SCLK_G3D>; + assigned-clock-parents = <&clock CLK_SCLK_VPLL>, + <&clock CLK_MOUT_G3D1>; + assigned-clock-rates = <0>, <0>, <160000000>, <160000000>; + + clocks = <&clock CLK_SCLK_G3D>, <&clock CLK_G3D>; + clock-names = "bus", "core"; + + interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "ppmmu0", "ppmmu1", "ppmmu2", "ppmmu3", + "gpmmu", "pp0", "pp1", "pp2", "pp3", "gp"; + status = "disabled"; + }; + tmu: tmu@100c0000 { interrupt-parent = <&combiner>; reg = <0x100C0000 0x100>;