On Wed, Jun 26, 2013 at 09:22:13AM -0400, alexdeucher@gmail.com wrote:
From: Alex Deucher alexander.deucher@amd.com
Type 2 packets are deprecated on CIK MEC and we should use type 3 nop packets. Setting the count field to the max value (0x3fff) indicates that only one dword should be skipped like a type 2 packet.
Signed-off-by: Alex Deucher alexander.deucher@amd.com
What about adding same comment in the code and not only in git commit message.
Reviewed-by: Jerome Glisse jglisse@redhat.com
drivers/gpu/drm/radeon/cik.c | 4 ++-- 1 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/radeon/cik.c b/drivers/gpu/drm/radeon/cik.c index 9d2d6bb..08dc4c2 100644 --- a/drivers/gpu/drm/radeon/cik.c +++ b/drivers/gpu/drm/radeon/cik.c @@ -5470,7 +5470,7 @@ static int cik_startup(struct radeon_device *rdev) ring = &rdev->ring[CAYMAN_RING_TYPE_CP1_INDEX]; r = radeon_ring_init(rdev, ring, ring->ring_size, RADEON_WB_CP1_RPTR_OFFSET, CP_HQD_PQ_RPTR, CP_HQD_PQ_WPTR,
0, 0xfffff, RADEON_CP_PACKET2);
if (r) return r; ring->me = 1; /* first MEC */0, 0xfffff, PACKET3(PACKET3_NOP, 0x3FFF));
@@ -5484,7 +5484,7 @@ static int cik_startup(struct radeon_device *rdev) ring = &rdev->ring[CAYMAN_RING_TYPE_CP2_INDEX]; r = radeon_ring_init(rdev, ring, ring->ring_size, RADEON_WB_CP2_RPTR_OFFSET, CP_HQD_PQ_RPTR, CP_HQD_PQ_WPTR,
0, 0xffffffff, RADEON_CP_PACKET2);
if (r) return r; /* dGPU only have 1 MEC */0, 0xffffffff, PACKET3(PACKET3_NOP, 0x3FFF));
-- 1.7.7.5
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