On 19/04/2022 05:32, Rex-BC Chen wrote:
From: "jason-jh.lin" jason-jh.lin@mediatek.com
Power:
- Add description for power-domains property.
GCE:
- Add description for mboxes property.
- Add description for mediatek,gce-client-reg property.
Signed-off-by: jason-jh.lin jason-jh.lin@mediatek.com Reviewed-by: AngeloGioacchino Del Regno angelogioacchino.delregno@collabora.com Reviewed-by: CK Hu ck.hu@mediatek.com
Applied, thanks.
Matthias
.../bindings/arm/mediatek/mediatek,mmsys.yaml | 31 +++++++++++++++++++ 1 file changed, 31 insertions(+)
diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml b/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml index b31d90dc9eb4..6c2c3edcd443 100644 --- a/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml +++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml @@ -41,6 +41,30 @@ properties: reg: maxItems: 1
- power-domains:
- description:
A phandle and PM domain specifier as defined by bindings
of the power controller specified by phandle. See
Documentation/devicetree/bindings/power/power-domain.yaml for details.
- mboxes:
- description:
Using mailbox to communicate with GCE, it should have this
property and list of phandle, mailbox specifiers. See
Documentation/devicetree/bindings/mailbox/mtk-gce.txt for details.
- $ref: /schemas/types.yaml#/definitions/phandle-array
- mediatek,gce-client-reg:
- description:
The register of client driver can be configured by gce with 4 arguments
defined in this property, such as phandle of gce, subsys id,
register offset and size.
Each subsys id is mapping to a base address of display function blocks
register which is defined in the gce header
include/dt-bindings/gce/<chip>-gce.h.
- $ref: /schemas/types.yaml#/definitions/phandle-array
- maxItems: 1
- "#clock-cells": const: 1
@@ -56,9 +80,16 @@ additionalProperties: false
examples: - |
- #include <dt-bindings/power/mt8173-power.h>
- #include <dt-bindings/gce/mt8173-gce.h>
mmsys: syscon@14000000 { compatible = "mediatek,mt8173-mmsys", "syscon"; reg = <0x14000000 0x1000>;
power-domains = <&spm MT8173_POWER_DOMAIN_MM>; #clock-cells = <1>; #reset-cells = <1>;
mboxes = <&gce 0 CMDQ_THR_PRIO_HIGHEST>,
<&gce 1 CMDQ_THR_PRIO_HIGHEST>;
mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0 0x1000>; };