Re: [PATCH v2 2/4] drm/vc4: hdmi: Add pixel bvb clock control

Hi Chanwoo,

On 9/1/20 1:27 PM, Chanwoo Choi wrote:

Hi Hoegeun,

It looks good to me. But, just one comment.

On 9/1/20 1:07 PM, Hoegeun Kwon wrote:

...

There is a problem that the output does not work at a resolution exceeding FHD. To solve this, we need to adjust the bvb clock at a resolution exceeding FHD.

Signed-off-by: Hoegeun Kwon hoegeun.kwon@samsung.com

drivers/gpu/drm/vc4/vc4_hdmi.c | 25 +++++++++++++++++++++++++ drivers/gpu/drm/vc4/vc4_hdmi.h | 1 + 2 files changed, 26 insertions(+)

diff --git a/drivers/gpu/drm/vc4/vc4_hdmi.c b/drivers/gpu/drm/vc4/vc4_hdmi.c index 95ec5eedea39..eb3192d1fd86 100644 --- a/drivers/gpu/drm/vc4/vc4_hdmi.c +++ b/drivers/gpu/drm/vc4/vc4_hdmi.c @@ -80,6 +80,7 @@ # define VC4_HD_M_ENABLE BIT(0)

#define CEC_CLOCK_FREQ 40000 +#define VC4_HSM_MID_CLOCK 149985000

static int vc4_hdmi_debugfs_regs(struct seq_file *m, void *unused) { @@ -380,6 +381,7 @@ static void vc4_hdmi_encoder_post_crtc_powerdown(struct drm_encoder *encoder) HDMI_WRITE(HDMI_VID_CTL, HDMI_READ(HDMI_VID_CTL) & ~VC4_HD_VID_CTL_ENABLE);

• clk_disable_unprepare(vc4_hdmi->pixel_bvb_clock); clk_disable_unprepare(vc4_hdmi->hsm_clock); clk_disable_unprepare(vc4_hdmi->pixel_clock);

@@ -638,6 +640,23 @@ static void vc4_hdmi_encoder_pre_crtc_configure(struct drm_encoder *encoder) return; }

• ret = clk_set_rate(vc4_hdmi->pixel_bvb_clock,

• 	(hsm_rate > VC4_HSM_MID_CLOCK ? 150000000 : 75000000));
  

• if (ret) {

• DRM_ERROR("Failed to set pixel bvb clock rate: %d\n", ret);
  

• clk_disable_unprepare(vc4_hdmi->hsm_clock);
  

• clk_disable_unprepare(vc4_hdmi->pixel_clock);
  

• return;
  

• }
• ret = clk_prepare_enable(vc4_hdmi->pixel_bvb_clock);
• if (ret) {

• DRM_ERROR("Failed to turn on pixel bvb clock: %d\n", ret);
  

• clk_disable_unprepare(vc4_hdmi->hsm_clock);
  

• clk_disable_unprepare(vc4_hdmi->pixel_clock);
  

• return;
  

• }

Generally, enable the clock before using clk and then change the clock rate. I think that you better to change the order between clk_prepare_enable and clk_set_rate.

Thank you for your comment.

As Maxime answered in another patch [1], there is no clear rule of order here.

[1] https://lkml.org/lkml/2020/9/1/327

Best regards,

Hoegeun