On 6/16/2022 1:07 PM, Stephen Boyd wrote:
Quoting Kuogee Hsieh (2022-06-16 10:09:21)
dp_ctrl keep an local cache of pixel_rate which increase confusing in regrading how pixel_rate being used. This patch refer pixel_rate directly from dp_panel to eliminate unnecessary pixel_rate variable from struct dp_ctrl.
Changes in v8: -- add this patch to remove pixel_rate from dp_ctrl
Signed-off-by: Kuogee Hsieh quic_khsieh@quicinc.com
I can send a proper patch for this myself later.
ok, then I will drop this patch
drivers/gpu/drm/msm/dp/dp_ctrl.c | 158 +++++++++++++++++++-------------------- drivers/gpu/drm/msm/dp/dp_ctrl.h | 2 - 2 files changed, 79 insertions(+), 81 deletions(-)
diff --git a/drivers/gpu/drm/msm/dp/dp_ctrl.c b/drivers/gpu/drm/msm/dp/dp_ctrl.c index 01028b5..6fddddd 100644 --- a/drivers/gpu/drm/msm/dp/dp_ctrl.c +++ b/drivers/gpu/drm/msm/dp/dp_ctrl.c @@ -1528,36 +1526,6 @@ static int dp_ctrl_link_maintenance(struct dp_ctrl_private *ctrl) return ret; }
-static int dp_ctrl_process_phy_test_request(struct dp_ctrl_private *ctrl) -{
int ret = 0;
if (!ctrl->link->phy_params.phy_test_pattern_sel) {
drm_dbg_dp(ctrl->drm_dev,
"no test pattern selected by sink\n");
return ret;
}
/*
* The global reset will need DP link related clocks to be
* running. Add the global reset just before disabling the
* link clocks and core clocks.
*/
ret = dp_ctrl_off(&ctrl->dp_ctrl);
if (ret) {
DRM_ERROR("failed to disable DP controller\n");
return ret;
}
ret = dp_ctrl_on_link(&ctrl->dp_ctrl);
if (!ret)
ret = dp_ctrl_on_stream_phy_test_report(&ctrl->dp_ctrl);
else
DRM_ERROR("failed to enable DP link controller\n");
return ret;
-}
- static bool dp_ctrl_send_phy_test_pattern(struct dp_ctrl_private *ctrl) { bool success = false;
@@ -1610,6 +1578,56 @@ static bool dp_ctrl_send_phy_test_pattern(struct dp_ctrl_private *ctrl) return success; }
+int dp_ctrl_on_stream_phy_test_report(struct dp_ctrl *dp_ctrl) +{
int ret = 0;
struct dp_ctrl_private *ctrl;
unsigned long pixel_rate;
ctrl = container_of(dp_ctrl, struct dp_ctrl_private, dp_ctrl);
pixel_rate = ctrl->panel->dp_mode.drm_mode.clock;
ret = dp_ctrl_enable_stream_clocks(ctrl, pixel_rate);
if (ret) {
DRM_ERROR("Failed to start pixel clocks. ret=%d\n", ret);
return ret;
}
dp_ctrl_send_phy_test_pattern(ctrl);
return 0;
+}
+static int dp_ctrl_process_phy_test_request(struct dp_ctrl_private *ctrl) +{
int ret = 0;
if (!ctrl->link->phy_params.phy_test_pattern_sel) {
drm_dbg_dp(ctrl->drm_dev,
"no test pattern selected by sink\n");
return ret;
}
/*
* The global reset will need DP link related clocks to be
* running. Add the global reset just before disabling the
* link clocks and core clocks.
*/
ret = dp_ctrl_off(&ctrl->dp_ctrl);
if (ret) {
DRM_ERROR("failed to disable DP controller\n");
return ret;
}
ret = dp_ctrl_on_link(&ctrl->dp_ctrl);
if (!ret)
ret = dp_ctrl_on_stream_phy_test_report(&ctrl->dp_ctrl);
else
DRM_ERROR("failed to enable DP link controller\n");
return ret;
+}
- void dp_ctrl_handle_sink_request(struct dp_ctrl *dp_ctrl) { struct dp_ctrl_private *ctrl;
I'd prefer these hunks to be part of a different patch. Either squashed into the previous patch, or after the previous patch to show that a forward declaration isn't necessary, but helped minimize the diff of that patch.
@@ -1685,6 +1703,7 @@ int dp_ctrl_on_link(struct dp_ctrl *dp_ctrl) u32 const phy_cts_pixel_clk_khz = 148500; u8 link_status[DP_LINK_STATUS_SIZE]; unsigned int training_step;
unsigned long pixel_rate; if (!dp_ctrl) return -EINVAL;