On Wed, Sep 15, 2021 at 04:38:31PM -0400, Sean Paul wrote:
From: Sean Paul seanpaul@chromium.org
This patch adds the bindings for the MSM DisplayPort HDCP registers which are required to write the HDCP key into the display controller as well as the registers to enable HDCP authentication/key exchange/encryption.
Cc: Rob Herring robh@kernel.org Cc: Stephen Boyd swboyd@chromium.org Signed-off-by: Sean Paul seanpaul@chromium.org Link: https://patchwork.freedesktop.org/patch/msgid/20210913175747.47456-13-sean@p... #v1
Changes in v2: -Drop register range names (Stephen)
-Fix yaml errors (Rob)
.../devicetree/bindings/display/msm/dp-controller.yaml | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-)
diff --git a/Documentation/devicetree/bindings/display/msm/dp-controller.yaml b/Documentation/devicetree/bindings/display/msm/dp-controller.yaml index 64d8d9e5e47a..80a55e9ff532 100644 --- a/Documentation/devicetree/bindings/display/msm/dp-controller.yaml +++ b/Documentation/devicetree/bindings/display/msm/dp-controller.yaml @@ -19,7 +19,7 @@ properties: - qcom,sc7180-dp
reg:
- maxItems: 1
- maxItems: 3
You need to define what each entry is.
items: - description: ... - description: ... - description: ...
interrupts: maxItems: 1 @@ -99,8 +99,9 @@ examples: #include <dt-bindings/power/qcom-rpmpd.h>
displayport-controller@ae90000 {
compatible = "qcom,sc7180-dp";reg = <0xae90000 0x1400>;
reg = <0 0x0ae90000 0 0x1400>,<0 0x0aed1000 0 0x174>,<0 0x0aee1000 0 0x2c>; interrupt-parent = <&mdss>; interrupts = <12>; clocks = <&dispcc DISP_CC_MDSS_AHB_CLK>,-- Sean Paul, Software Engineer, Google / Chromium OS