On Wed, Jul 08, 2020 at 11:14:22PM +0200, Hans de Goede wrote:
The datasheet specifies that programming the base_unit part of the ctrl register to 0 results in a contineous low signal.
Adjust the get_state method to reflect this by setting pwm_state.period to 1 and duty_cycle to 0.
...
- if (freq == 0) {
/* In this case the PWM outputs a continous low signal */
state->period = 1;
I guess this should be something like half of the range (so base unit calc will give 128). Because with period = 1 (too small) it will give too small base unit (if apply) and as a result we get high frequency pulses.
state->duty_cycle = 0;
- } else { state->period = NSEC_PER_SEC / (unsigned long)freq;
on_time_div *= state->period;
do_div(on_time_div, 255);
state->duty_cycle = on_time_div;
- }