The argument clear of the function dpu_core_irq_read() is always true. Remove it.
Reviewed-by: Abhinav Kumar quic_abhinavk@quicinc.com Reviewed-by: Stephen Boyd swboyd@chromium.org Signed-off-by: Dmitry Baryshkov dmitry.baryshkov@linaro.org --- drivers/gpu/drm/msm/disp/dpu1/dpu_core_irq.h | 4 +--- drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 3 +-- drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c | 4 ++-- 3 files changed, 4 insertions(+), 7 deletions(-)
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_core_irq.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_core_irq.h index 7023ccb79814..6dce5d89f817 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_core_irq.h +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_core_irq.h @@ -33,13 +33,11 @@ irqreturn_t dpu_core_irq(struct msm_kms *kms); * dpu_core_irq_read - IRQ helper function for reading IRQ status * @dpu_kms: DPU handle * @irq_idx: irq index - * @clear: True to clear the irq after read * @return: non-zero if irq detected; otherwise no irq detected */ u32 dpu_core_irq_read( struct dpu_kms *dpu_kms, - int irq_idx, - bool clear); + int irq_idx);
/** * dpu_core_irq_register_callback - For registering callback function on IRQ diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c index 1e648db439f9..5576b8a3e6ee 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c @@ -301,8 +301,7 @@ int dpu_encoder_helper_wait_for_irq(struct dpu_encoder_phys *phys_enc, wait_info);
if (ret <= 0) { - irq_status = dpu_core_irq_read(phys_enc->dpu_kms, - irq->irq_idx, true); + irq_status = dpu_core_irq_read(phys_enc->dpu_kms, irq->irq_idx); if (irq_status) { unsigned long flags;
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c index 71882d3fe705..85404c9ab4e1 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c @@ -357,7 +357,7 @@ static void dpu_disable_all_irqs(struct dpu_kms *dpu_kms) wmb(); }
-u32 dpu_core_irq_read(struct dpu_kms *dpu_kms, int irq_idx, bool clear) +u32 dpu_core_irq_read(struct dpu_kms *dpu_kms, int irq_idx) { struct dpu_hw_intr *intr = dpu_kms->hw_intr; int reg_idx; @@ -384,7 +384,7 @@ u32 dpu_core_irq_read(struct dpu_kms *dpu_kms, int irq_idx, bool clear) intr_status = DPU_REG_READ(&intr->hw, dpu_intr_set[reg_idx].status_off) & DPU_IRQ_MASK(irq_idx); - if (intr_status && clear) + if (intr_status) DPU_REG_WRITE(&intr->hw, dpu_intr_set[reg_idx].clr_off, intr_status);