Add interfaces needed for configuring OCMEM.
Signed-off-by: Rob Clark robdclark@gmail.com --- drivers/firmware/qcom_scm-32.c | 57 ++++++++++++++++++++++ drivers/firmware/qcom_scm-64.c | 16 +++++++ drivers/firmware/qcom_scm.c | 106 +++++++++++++++++++++++++++++++++++++++++ drivers/firmware/qcom_scm.h | 13 +++++ include/linux/qcom_scm.h | 10 ++++ 5 files changed, 202 insertions(+)
diff --git a/drivers/firmware/qcom_scm-32.c b/drivers/firmware/qcom_scm-32.c index e9c306b..656d8fe 100644 --- a/drivers/firmware/qcom_scm-32.c +++ b/drivers/firmware/qcom_scm-32.c @@ -500,6 +500,63 @@ int __qcom_scm_hdcp_req(struct qcom_scm_hdcp_req *req, u32 req_cnt, u32 *resp) req, req_cnt * sizeof(*req), resp, sizeof(*resp)); }
+int __qcom_scm_ocmem_secure_cfg(unsigned sec_id) +{ + int ret, scm_ret = 0; + struct msm_scm_sec_cfg { + unsigned int id; + unsigned int spare; + } cfg; + + cfg.id = sec_id; + + + ret = qcom_scm_call(QCOM_SCM_OCMEM_SECURE_SVC, QCOM_SCM_OCMEM_SECURE_CFG, + &cfg, sizeof(cfg), &scm_ret, sizeof(scm_ret)); + + if (ret || scm_ret) { + pr_err("ocmem: Failed to enable secure programming\n"); + return ret ? ret : -EINVAL; + } + + return 0; +} + +int __qcom_scm_ocmem_lock(uint32_t id, uint32_t offset, uint32_t size, + uint32_t mode) +{ + struct ocmem_tz_lock { + u32 id; + u32 offset; + u32 size; + u32 mode; + } request; + + request.id = id; + request.offset = offset; + request.size = size; + request.mode = mode; + + return qcom_scm_call(QCOM_SCM_OCMEM_SVC, QCOM_SCM_OCMEM_LOCK_CMD, + &request, sizeof(request), NULL, 0); +} + +int __qcom_scm_ocmem_unlock(uint32_t id, uint32_t offset, uint32_t size) +{ + struct ocmem_tz_unlock { + u32 id; + u32 offset; + u32 size; + } request; + + request.id = id; + request.offset = offset; + request.size = size; + + return qcom_scm_call(QCOM_SCM_OCMEM_SVC, QCOM_SCM_OCMEM_UNLOCK_CMD, + &request, sizeof(request), NULL, 0); +} + bool __qcom_scm_pas_supported(u32 peripheral) { __le32 out; diff --git a/drivers/firmware/qcom_scm-64.c b/drivers/firmware/qcom_scm-64.c index e64fd92..ef5c59e 100644 --- a/drivers/firmware/qcom_scm-64.c +++ b/drivers/firmware/qcom_scm-64.c @@ -62,6 +62,22 @@ int __qcom_scm_hdcp_req(struct qcom_scm_hdcp_req *req, u32 req_cnt, u32 *resp) return -ENOTSUPP; }
+int __qcom_scm_ocmem_secure_cfg(unsigned sec_id) +{ + return -ENOTSUPP; +} + +int __qcom_scm_ocmem_lock(uint32_t id, uint32_t offset, uint32_t size, + uint32_t mode) +{ + return -ENOTSUPP; +} + +int __qcom_scm_ocmem_unlock(uint32_t id, uint32_t offset, uint32_t size) +{ + return -ENOTSUPP; +} + bool __qcom_scm_pas_supported(u32 peripheral) { return false; diff --git a/drivers/firmware/qcom_scm.c b/drivers/firmware/qcom_scm.c index 118df0a..59b1007 100644 --- a/drivers/firmware/qcom_scm.c +++ b/drivers/firmware/qcom_scm.c @@ -154,6 +154,112 @@ int qcom_scm_hdcp_req(struct qcom_scm_hdcp_req *req, u32 req_cnt, u32 *resp) EXPORT_SYMBOL(qcom_scm_hdcp_req);
/** + * qcom_scm_ocmem_secure_available() - Check if secure environment supports + * OCMEM. + * + * Return true if OCMEM secure interface is supported, false if not. + */ +bool qcom_scm_ocmem_secure_available(void) +{ + int ret = qcom_scm_clk_enable(); + + if (ret) + goto clk_err; + + ret = __qcom_scm_is_call_available(QCOM_SCM_OCMEM_SECURE_SVC, + QCOM_SCM_OCMEM_SECURE_CFG); + + qcom_scm_clk_disable(); + +clk_err: + return (ret > 0) ? true : false; +} +EXPORT_SYMBOL(qcom_scm_ocmem_secure_available); + +/** + * qcom_scm_ocmem_secure_cfg() - call OCMEM secure cfg interface + */ +int qcom_scm_ocmem_secure_cfg(unsigned sec_id) +{ + int ret = qcom_scm_clk_enable(); + + if (ret) + return ret; + + ret = __qcom_scm_ocmem_secure_cfg(sec_id); + qcom_scm_clk_disable(); + + return ret; +} +EXPORT_SYMBOL(qcom_scm_ocmem_secure_cfg); + +/** + * qcom_scm_ocmem_lock_available() - is OCMEM lock/unlock interface available + */ +bool qcom_scm_ocmem_lock_available(void) +{ + int ret = qcom_scm_clk_enable(); + + if (ret) + goto clk_err; + + ret = __qcom_scm_is_call_available(QCOM_SCM_OCMEM_SVC, + QCOM_SCM_OCMEM_LOCK_CMD); + + qcom_scm_clk_disable(); + +clk_err: + return (ret > 0) ? true : false; +} +EXPORT_SYMBOL(qcom_scm_ocmem_lock_available); + +/** + * qcom_scm_ocmem_lock() - call OCMEM lock interface to assign an OCMEM + * region to the specified initiator + * + * @id: tz initiator id + * @offset: OCMEM offset + * @size: OCMEM size + * @mode: access mode (WIDE/NARROW) + */ +int qcom_scm_ocmem_lock(uint32_t id, uint32_t offset, uint32_t size, + uint32_t mode) +{ + int ret = qcom_scm_clk_enable(); + + if (ret) + return ret; + + ret = __qcom_scm_ocmem_lock(id, offset, size, mode); + qcom_scm_clk_disable(); + + return ret; +} +EXPORT_SYMBOL(qcom_scm_ocmem_lock); + +/** + * qcom_scm_ocmem_unlock() - call OCMEM unlock interface to release an OCMEM + * region from the specified initiator + * + * @id: tz initiator id + * @offset: OCMEM offset + * @size: OCMEM size + */ +int qcom_scm_ocmem_unlock(uint32_t id, uint32_t offset, uint32_t size) +{ + int ret = qcom_scm_clk_enable(); + + if (ret) + return ret; + + ret = __qcom_scm_ocmem_unlock(id, offset, size); + qcom_scm_clk_disable(); + + return ret; +} +EXPORT_SYMBOL(qcom_scm_ocmem_unlock); + +/** * qcom_scm_pas_supported() - Check if the peripheral authentication service is * available for the given peripherial * @peripheral: peripheral id diff --git a/drivers/firmware/qcom_scm.h b/drivers/firmware/qcom_scm.h index 220d19c..e01656f3 100644 --- a/drivers/firmware/qcom_scm.h +++ b/drivers/firmware/qcom_scm.h @@ -36,6 +36,19 @@ extern int __qcom_scm_is_call_available(u32 svc_id, u32 cmd_id); extern int __qcom_scm_hdcp_req(struct qcom_scm_hdcp_req *req, u32 req_cnt, u32 *resp);
+#define QCOM_SCM_OCMEM_SECURE_SVC 0xc +#define QCOM_SCM_OCMEM_SECURE_CFG 0x2 + +extern int __qcom_scm_ocmem_secure_cfg(unsigned sec_id); + +#define QCOM_SCM_OCMEM_SVC 0xf +#define QCOM_SCM_OCMEM_LOCK_CMD 0x1 +#define QCOM_SCM_OCMEM_UNLOCK_CMD 0x2 + +extern int __qcom_scm_ocmem_lock(uint32_t id, uint32_t offset, uint32_t size, + uint32_t mode); +extern int __qcom_scm_ocmem_unlock(uint32_t id, uint32_t offset, uint32_t size); + #define QCOM_SCM_SVC_PIL 0x2 #define QCOM_SCM_PAS_INIT_IMAGE_CMD 0x1 #define QCOM_SCM_PAS_MEM_SETUP_CMD 0x2 diff --git a/include/linux/qcom_scm.h b/include/linux/qcom_scm.h index 46d41e4..a934457 100644 --- a/include/linux/qcom_scm.h +++ b/include/linux/qcom_scm.h @@ -23,10 +23,20 @@ struct qcom_scm_hdcp_req { u32 val; };
+extern bool qcom_scm_is_available(void); + extern bool qcom_scm_hdcp_available(void); extern int qcom_scm_hdcp_req(struct qcom_scm_hdcp_req *req, u32 req_cnt, u32 *resp);
+extern bool qcom_scm_ocmem_secure_available(void); +extern int qcom_scm_ocmem_secure_cfg(unsigned sec_id); + +extern bool qcom_scm_ocmem_lock_available(void); +extern int qcom_scm_ocmem_lock(uint32_t id, uint32_t offset, uint32_t size, + uint32_t mode); +extern int qcom_scm_ocmem_unlock(uint32_t id, uint32_t offset, uint32_t size); + extern bool qcom_scm_pas_supported(u32 peripheral); extern int qcom_scm_pas_init_image(u32 peripheral, const void *metadata, size_t size); extern int qcom_scm_pas_mem_setup(u32 peripheral, phys_addr_t addr, phys_addr_t size);