On Mon, Feb 26, 2018 at 10:42:34PM +0530, Ramalingam C wrote:
This series addresses the requriement of below HDCP compliance tests DP: 1A-06 and 1B-05 HDMI: 1A-04 and 1A-07a
One of the patch uses the I915 power infra-structure for checking the power state of PW#1. Which enables the init path for all legacy platforms.
And encoder specific msg availability detection is moved into hdcp_shim. This will help to sync with DP hdcp data availability in the best possible way by fielding the CP_IRQ.
Do we want any of these on 4.16 or backported? Please consider the use of "Fixes:" on whatever makes sense.
Thanks, Rodrigo.
Ramalingam C (5): drm/i915: Read HDCP R0 thrice in case of mismatch drm/i915: read Vprime thrice incase of mismatch drm/i915: Check hdcp key loadability drm/i915: Poll hdcp register on sudden NACK drm/i915: Move hdcp msg detection into shim
drivers/gpu/drm/i915/intel_dp.c | 70 ++++++++++++++-- drivers/gpu/drm/i915/intel_drv.h | 6 +- drivers/gpu/drm/i915/intel_hdcp.c | 166 +++++++++++++++++++++++++++----------- drivers/gpu/drm/i915/intel_hdmi.c | 28 ++++++- 4 files changed, 214 insertions(+), 56 deletions(-)
-- 2.7.4
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