On Tue, Oct 15, 2019 at 08:21:44AM +0000, Mihail Atanassov wrote:
On Tuesday, 15 October 2019 02:16:11 BST james qian wang (Arm Technology China) wrote:
On Mon, Oct 14, 2019 at 11:58:48AM -0400, Ilia Mirkin wrote:
On Fri, Oct 11, 2019 at 1:43 AM james qian wang (Arm Technology China) james.qian.wang@arm.com wrote:
Add a new helper function drm_color_ctm_s31_32_to_qm_n() for driver to convert S31.32 sign-magnitude to Qm.n 2's complement that supported by hardware.
Signed-off-by: james qian wang (Arm Technology China) james.qian.wang@arm.com
drivers/gpu/drm/drm_color_mgmt.c | 23 +++++++++++++++++++++++ include/drm/drm_color_mgmt.h | 2 ++ 2 files changed, 25 insertions(+)
diff --git a/drivers/gpu/drm/drm_color_mgmt.c b/drivers/gpu/drm/drm_color_mgmt.c index 4ce5c6d8de99..3d533d0b45af 100644 --- a/drivers/gpu/drm/drm_color_mgmt.c +++ b/drivers/gpu/drm/drm_color_mgmt.c @@ -132,6 +132,29 @@ uint32_t drm_color_lut_extract(uint32_t user_input, uint32_t bit_precision) } EXPORT_SYMBOL(drm_color_lut_extract);
+/**
- drm_color_ctm_s31_32_to_qm_n
- @user_input: input value
- @m: number of integer bits
Is this the full 2's complement value? i.e. including the "sign" bit of the 2's complement representation? I'd kinda assume that m = 32, n = 0 would just get me the integer portion of this, for example.
@m doesn't include "sign-bit"
and for this conversion only support m <= 31, n <= 32.
- @n: number of fractinal bits
fractional
Thank you.
- Convert and clamp S31.32 sign-magnitude to Qm.n 2's complement.
- */
+uint64_t drm_color_ctm_s31_32_to_qm_n(uint64_t user_input,
uint32_t m, uint32_t n)+{
u64 mag = (user_input & ~BIT_ULL(63)) >> (32 - n);bool negative = !!(user_input & BIT_ULL(63));s64 val;/* the range of signed 2s complement is [-2^n+m, 2^n+m - 1] */This implies that n = 32, m = 0 would actually yield a 33-bit 2's complement number. Is that what you meant?
Yes, since m doesn't include sign-bit So a Q0.32 is a 33bit value.
I gotta say this would be quite confusing. There is no sign bit in 2's complement, per se. The MSbit just has a negative weight. Q16.16 is a 32-bit value, so Q0.32 should also be a 32-bit value with weights -2^-1, +2^-2, etc.
Best to follow what Wikipedia says, right :).
Sorry, My fault! will correct in v5.
val = clamp_val(mag, 0, negative ? BIT(n + m) : BIT(n + m) - 1);I'm going to play with numpy to convince myself that this is right (esp with the endpoints), but in the meanwhile, you probably want to use BIT_ULL in case n + m > 32 (I don't think that's the case with any current hardware though).
Yes, you are right, I need to use BIT_ULL, and Mihail also point this out. This is function is drived from our internal s31_32_to_q2_14()
return negative ? 0ll - val : val;Why not just "negative ? -val : val"?
will correct it.
+} +EXPORT_SYMBOL(drm_color_ctm_s31_32_to_qm_n);
/**
- drm_crtc_enable_color_mgmt - enable color management properties
- @crtc: DRM CRTC
diff --git a/include/drm/drm_color_mgmt.h b/include/drm/drm_color_mgmt.h index d1c662d92ab7..60fea5501886 100644 --- a/include/drm/drm_color_mgmt.h +++ b/include/drm/drm_color_mgmt.h @@ -30,6 +30,8 @@ struct drm_crtc; struct drm_plane;
uint32_t drm_color_lut_extract(uint32_t user_input, uint32_t bit_precision); +uint64_t drm_color_ctm_s31_32_to_qm_n(uint64_t user_input,
uint32_t m, uint32_t n);void drm_crtc_enable_color_mgmt(struct drm_crtc *crtc, uint degamma_lut_size, -- 2.20.1
-- Mihail