All global variables are read only.
Signed-off-by: Andrzej Hajda a.hajda@samsung.com --- drivers/gpu/drm/exynos/exynos_drm_dsi.c | 30 +++++++++++++++--------------- 1 file changed, 15 insertions(+), 15 deletions(-)
diff --git a/drivers/gpu/drm/exynos/exynos_drm_dsi.c b/drivers/gpu/drm/exynos/exynos_drm_dsi.c index 54fcf00..34b1edd 100644 --- a/drivers/gpu/drm/exynos/exynos_drm_dsi.c +++ b/drivers/gpu/drm/exynos/exynos_drm_dsi.c @@ -241,7 +241,7 @@ struct exynos_dsi_transfer { #define DSIM_STATE_VIDOUT_AVAILABLE BIT(3)
struct exynos_dsi_driver_data { - unsigned int *reg_ofs; + const unsigned int *reg_ofs; unsigned int plltmr_reg; unsigned int has_freqband:1; unsigned int has_clklane_stop:1; @@ -249,7 +249,7 @@ struct exynos_dsi_driver_data { unsigned int max_freq; unsigned int wait_for_reset; unsigned int num_bits_resol; - unsigned int *reg_values; + const unsigned int *reg_values; };
struct exynos_dsi { @@ -330,7 +330,7 @@ static inline u32 exynos_dsi_read(struct exynos_dsi *dsi, enum reg_idx idx) return readl(dsi->reg_base + dsi->driver_data->reg_ofs[idx]); }
-static unsigned int exynos_reg_ofs[] = { +static const unsigned int exynos_reg_ofs[] = { [DSIM_STATUS_REG] = 0x00, [DSIM_SWRST_REG] = 0x04, [DSIM_CLKCTRL_REG] = 0x08, @@ -354,7 +354,7 @@ static unsigned int exynos_reg_ofs[] = { [DSIM_PHYTIMING2_REG] = 0x6c, };
-static unsigned int exynos5433_reg_ofs[] = { +static const unsigned int exynos5433_reg_ofs[] = { [DSIM_STATUS_REG] = 0x04, [DSIM_SWRST_REG] = 0x0C, [DSIM_CLKCTRL_REG] = 0x10, @@ -396,7 +396,7 @@ enum reg_value_idx { PHYTIMING_HS_TRAIL };
-static unsigned int reg_values[] = { +static const unsigned int reg_values[] = { [RESET_TYPE] = DSIM_SWRST, [PLL_TIMER] = 500, [STOP_STATE_CNT] = 0xf, @@ -414,7 +414,7 @@ static unsigned int reg_values[] = { [PHYTIMING_HS_TRAIL] = DSIM_PHYTIMING2_HS_TRAIL(0x0b), };
-static unsigned int exynos5422_reg_values[] = { +static const unsigned int exynos5422_reg_values[] = { [RESET_TYPE] = DSIM_SWRST, [PLL_TIMER] = 500, [STOP_STATE_CNT] = 0xf, @@ -432,7 +432,7 @@ static unsigned int exynos5422_reg_values[] = { [PHYTIMING_HS_TRAIL] = DSIM_PHYTIMING2_HS_TRAIL(0x0d), };
-static unsigned int exynos5433_reg_values[] = { +static const unsigned int exynos5433_reg_values[] = { [RESET_TYPE] = DSIM_FUNCRST, [PLL_TIMER] = 22200, [STOP_STATE_CNT] = 0xa, @@ -450,7 +450,7 @@ static unsigned int exynos5433_reg_values[] = { [PHYTIMING_HS_TRAIL] = DSIM_PHYTIMING2_HS_TRAIL(0x0c), };
-static struct exynos_dsi_driver_data exynos3_dsi_driver_data = { +static const struct exynos_dsi_driver_data exynos3_dsi_driver_data = { .reg_ofs = exynos_reg_ofs, .plltmr_reg = 0x50, .has_freqband = 1, @@ -462,7 +462,7 @@ static struct exynos_dsi_driver_data exynos3_dsi_driver_data = { .reg_values = reg_values, };
-static struct exynos_dsi_driver_data exynos4_dsi_driver_data = { +static const struct exynos_dsi_driver_data exynos4_dsi_driver_data = { .reg_ofs = exynos_reg_ofs, .plltmr_reg = 0x50, .has_freqband = 1, @@ -474,7 +474,7 @@ static struct exynos_dsi_driver_data exynos4_dsi_driver_data = { .reg_values = reg_values, };
-static struct exynos_dsi_driver_data exynos4415_dsi_driver_data = { +static const struct exynos_dsi_driver_data exynos4415_dsi_driver_data = { .reg_ofs = exynos_reg_ofs, .plltmr_reg = 0x58, .has_clklane_stop = 1, @@ -485,7 +485,7 @@ static struct exynos_dsi_driver_data exynos4415_dsi_driver_data = { .reg_values = reg_values, };
-static struct exynos_dsi_driver_data exynos5_dsi_driver_data = { +static const struct exynos_dsi_driver_data exynos5_dsi_driver_data = { .reg_ofs = exynos_reg_ofs, .plltmr_reg = 0x58, .num_clks = 2, @@ -495,7 +495,7 @@ static struct exynos_dsi_driver_data exynos5_dsi_driver_data = { .reg_values = reg_values, };
-static struct exynos_dsi_driver_data exynos5433_dsi_driver_data = { +static const struct exynos_dsi_driver_data exynos5433_dsi_driver_data = { .reg_ofs = exynos5433_reg_ofs, .plltmr_reg = 0xa0, .has_clklane_stop = 1, @@ -506,7 +506,7 @@ static struct exynos_dsi_driver_data exynos5433_dsi_driver_data = { .reg_values = exynos5433_reg_values, };
-static struct exynos_dsi_driver_data exynos5422_dsi_driver_data = { +static const struct exynos_dsi_driver_data exynos5422_dsi_driver_data = { .reg_ofs = exynos5433_reg_ofs, .plltmr_reg = 0xa0, .has_clklane_stop = 1, @@ -517,7 +517,7 @@ static struct exynos_dsi_driver_data exynos5422_dsi_driver_data = { .reg_values = exynos5422_reg_values, };
-static struct of_device_id exynos_dsi_of_match[] = { +static const struct of_device_id exynos_dsi_of_match[] = { { .compatible = "samsung,exynos3250-mipi-dsi", .data = &exynos3_dsi_driver_data }, { .compatible = "samsung,exynos4210-mipi-dsi", @@ -714,7 +714,7 @@ static int exynos_dsi_enable_clock(struct exynos_dsi *dsi) static void exynos_dsi_set_phy_ctrl(struct exynos_dsi *dsi) { struct exynos_dsi_driver_data *driver_data = dsi->driver_data; - unsigned int *reg_values = driver_data->reg_values; + const unsigned int *reg_values = driver_data->reg_values; u32 reg;
if (driver_data->has_freqband)