On Tue, Aug 20, 2013 at 5:38 AM, Liu Ying Ying.Liu@freescale.com wrote:
diff --git a/Documentation/devicetree/bindings/clock/imx6q-clock.txt b/Documentation/devicetree/bindings/clock/imx6q-clock.txt index 5a90a72..90e923e 100644 --- a/Documentation/devicetree/bindings/clock/imx6q-clock.txt +++ b/Documentation/devicetree/bindings/clock/imx6q-clock.txt @@ -89,8 +89,6 @@ clocks and IDs. gpu3d_shader 74 ipu1_podf 75 ipu2_podf 76
ldb_di0_podf 77
ldb_di1_podf 78 ipu1_di0_pre 79 ipu1_di1_pre 80 ipu2_di0_pre 81
This causes a 'hole' in the clock numbering scheme: 74, 75, 76, 79, 80, etc