On Wed, Sep 18, 2019 at 12:32 PM Krzysztof Kozlowski krzk@kernel.org wrote:
Convert Samsung PWM (S3C, S5P and Exynos SoCs) bindings to DT schema format using json-schema.
Signed-off-by: Krzysztof Kozlowski krzk@kernel.org
Changes since v1:
- Indent example with four spaces (more readable),
- Fix samsung,pwm-outputs after review,
- Remove double-quotes from clock names.
.../devicetree/bindings/pwm/pwm-samsung.txt | 51 --------- .../devicetree/bindings/pwm/pwm-samsung.yaml | 107 ++++++++++++++++++ 2 files changed, 107 insertions(+), 51 deletions(-) delete mode 100644 Documentation/devicetree/bindings/pwm/pwm-samsung.txt create mode 100644 Documentation/devicetree/bindings/pwm/pwm-samsung.yaml
diff --git a/Documentation/devicetree/bindings/pwm/pwm-samsung.txt b/Documentation/devicetree/bindings/pwm/pwm-samsung.txt deleted file mode 100644 index 5538de9c2007..000000000000 --- a/Documentation/devicetree/bindings/pwm/pwm-samsung.txt +++ /dev/null @@ -1,51 +0,0 @@ -* Samsung PWM timers
-Samsung SoCs contain PWM timer blocks which can be used for system clock source -and clock event timers, as well as to drive SoC outputs with PWM signal. Each -PWM timer block provides 5 PWM channels (not all of them can drive physical -outputs - see SoC and board manual).
-Be aware that the clocksource driver supports only uniprocessor systems.
-Required properties: -- compatible : should be one of following:
- samsung,s3c2410-pwm - for 16-bit timers present on S3C24xx SoCs
- samsung,s3c6400-pwm - for 32-bit timers present on S3C64xx SoCs
- samsung,s5p6440-pwm - for 32-bit timers present on S5P64x0 SoCs
- samsung,s5pc100-pwm - for 32-bit timers present on S5PC100, S5PV210,
Exynos4210 rev0 SoCs
- samsung,exynos4210-pwm - for 32-bit timers present on Exynos4210,
Exynos4x12, Exynos5250 and Exynos5420 SoCs
-- reg: base address and size of register area -- interrupts: list of timer interrupts (one interrupt per timer, starting at
- timer 0)
-- clock-names: should contain all following required clock names:
- "timers" - PWM base clock used to generate PWM signals,
- and any subset of following optional clock names:
- "pwm-tclk0" - first external PWM clock source,
- "pwm-tclk1" - second external PWM clock source.
- Note that not all IP variants allow using all external clock sources.
- Refer to SoC documentation to learn which clock source configurations
- are available.
-- clocks: should contain clock specifiers of all clocks, which input names
- have been specified in clock-names property, in same order.
-- #pwm-cells: should be 3. See pwm.txt in this directory for a description of
- the cells format. The only third cell flag supported by this binding is
- PWM_POLARITY_INVERTED.
-Optional properties: -- samsung,pwm-outputs: list of PWM channels used as PWM outputs on particular
- platform - an array of up to 5 elements being indices of PWM channels
- (from 0 to 4), the order does not matter.
-Example:
pwm@7f006000 {
compatible = "samsung,s3c6400-pwm";
reg = <0x7f006000 0x1000>;
interrupt-parent = <&vic0>;
interrupts = <23>, <24>, <25>, <27>, <28>;
clocks = <&clock 67>;
clock-names = "timers";
samsung,pwm-outputs = <0>, <1>;
#pwm-cells = <3>;
}
diff --git a/Documentation/devicetree/bindings/pwm/pwm-samsung.yaml b/Documentation/devicetree/bindings/pwm/pwm-samsung.yaml new file mode 100644 index 000000000000..06d11faabff6 --- /dev/null +++ b/Documentation/devicetree/bindings/pwm/pwm-samsung.yaml @@ -0,0 +1,107 @@ +# SPDX-License-Identifier: GPL-2.0 +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/pwm/pwm-samsung.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml#
+title: Samsung SoC PWM timers
+maintainers:
- Thierry Reding thierry.reding@gmail.com
- Krzysztof Kozlowski krzk@kernel.org
+description: |+
- Samsung SoCs contain PWM timer blocks which can be used for system clock source
- and clock event timers, as well as to drive SoC outputs with PWM signal. Each
- PWM timer block provides 5 PWM channels (not all of them can drive physical
- outputs - see SoC and board manual).
- Be aware that the clocksource driver supports only uniprocessor systems.
+allOf:
- $ref: pwm.yaml#
+properties:
- compatible:
- enum:
- samsung,s3c2410-pwm # 16-bit, S3C24xx
- samsung,s3c6400-pwm # 32-bit, S3C64xx
- samsung,s5p6440-pwm # 32-bit, S5P64x0
- samsung,s5pc100-pwm # 32-bit, S5PC100, S5PV210, Exynos4210 rev0 SoCs
- samsung,exynos4210-pwm # 32-bit, Exynos
- reg:
- maxItems: 1
- clocks:
- minItems: 1
- maxItems: 3
- clock-names:
- description: |
Should contain all following required clock names:
- "timers" - PWM base clock used to generate PWM signals,
and any subset of following optional clock names:
- "pwm-tclk0" - first external PWM clock source,
- "pwm-tclk1" - second external PWM clock source.
Note that not all IP variants allow using all external clock sources.
Refer to SoC documentation to learn which clock source configurations
are available.
- oneOf:
- items:
- const: timers
- items:
- const: timers
- const: pwm-tclk0
- items:
- const: timers
- const: pwm-tclk1
- items:
- const: timers
- const: pwm-tclk0
- const: pwm-tclk1
- interrupts:
- description:
One interrupt per timer, starting at timer 0.
- minItems: 1
- maxItems: 5
- "#pwm-cells":
- description:
The only third cell flag supported by this binding
is PWM_POLARITY_INVERTED.
- const: 3
- samsung,pwm-outputs:
- description:
A list of PWM channels used as PWM outputs on particular platform.
It is an array of up to 5 elements being indices of PWM channels
(from 0 to 4), the order does not matter.
- allOf:
- $ref: /schemas/types.yaml#/definitions/uint32-array
- uniqueItems: true
- items:
minimum: 0
maximum: 4
+required:
- clocks
- clock-names
- compatible
- interrupts
- "#pwm-cells"
- reg
additionalProperties: false
should work here. And in the rng binding too.
Rob