On Mon, 25 Jul 2011 23:36:34 -0700 Keith Packard keithp@keithp.com wrote:
Display port pipe selection on CPT is not done with a bit in the output register, rather it is controlled by a couple of bits in the separate transcoder register which indicate which display port output is connected to the transcoder.
This patch replaces the simplistic macro DP_PIPE_ENABLED with the rather more complicated function dp_pipe_enabled which checks the output register to see if that is enabled, and then goes on to either check the output register pipe selection bit (on non-CPT) or the transcoder DP selection bits (on CPT).
Before this patch, any time the mode of pipe A was changed, any display port outputs on pipe B would get disabled as intel_disable_pch_ports would ensure that the mode setting operation could occur on pipe A without interference from other outputs connected to that pch port
Signed-off-by: Keith Packard keithp@keithp.com
Ah nice catch. I expect one day we'll have all the chipset and PCH differences coded...
Reviewed-by: Jesse Barnes jbarnes@virtuousgeek.org