In plane enabling sequence, plane gamma bit is by default enabled. Plane gamma gets higher priority than pipe gamma, if both enabled.
This patch disables plane gamma from sequence. If required, plane gamma can be enabled via the color manager drm interface.
Signed-off-by: Shashank Sharma shashank.sharma@intel.com Signed-off-by: Kumar, Kiran S kiran.s.kumar@intel.com --- drivers/gpu/drm/i915/intel_display.c | 2 +- drivers/gpu/drm/i915/intel_sprite.c | 7 ++++--- 2 files changed, 5 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index 1ae601a..98dd5ad 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -2816,7 +2816,7 @@ static void ironlake_update_primary_plane(struct drm_crtc *crtc,
pixel_size = drm_format_plane_cpp(fb->pixel_format, 0);
- dspcntr = DISPPLANE_GAMMA_ENABLE; + dspcntr = (DISPPLANE_GAMMA_ENABLE | PLANE_CTL_PLANE_GAMMA_DISABLE);
dspcntr |= DISPLAY_PLANE_ENABLE;
diff --git a/drivers/gpu/drm/i915/intel_sprite.c b/drivers/gpu/drm/i915/intel_sprite.c index 2b96f33..b9dfeb0 100644 --- a/drivers/gpu/drm/i915/intel_sprite.c +++ b/drivers/gpu/drm/i915/intel_sprite.c @@ -203,7 +203,8 @@ skl_update_plane(struct drm_plane *drm_plane, struct drm_crtc *crtc,
plane_ctl = PLANE_CTL_ENABLE | PLANE_CTL_PIPE_GAMMA_ENABLE | - PLANE_CTL_PIPE_CSC_ENABLE; + PLANE_CTL_PIPE_CSC_ENABLE | + PLANE_CTL_PLANE_GAMMA_DISABLE;
plane_ctl |= skl_plane_ctl_format(fb->pixel_format); plane_ctl |= skl_plane_ctl_tiling(fb->modifier[0]); @@ -402,7 +403,7 @@ vlv_update_plane(struct drm_plane *dplane, struct drm_crtc *crtc, * Enable gamma to match primary/cursor plane behaviour. * FIXME should be user controllable via propertiesa. */ - sprctl |= SP_GAMMA_ENABLE; + sprctl |= (SP_GAMMA_ENABLE | PLANE_CTL_PLANE_GAMMA_DISABLE);
if (obj->tiling_mode != I915_TILING_NONE) sprctl |= SP_TILED; @@ -521,7 +522,7 @@ ivb_update_plane(struct drm_plane *plane, struct drm_crtc *crtc, * Enable gamma to match primary/cursor plane behaviour. * FIXME should be user controllable via propertiesa. */ - sprctl |= SPRITE_GAMMA_ENABLE; + sprctl |= (SPRITE_GAMMA_ENABLE | PLANE_CTL_PLANE_GAMMA_DISABLE);
if (obj->tiling_mode != I915_TILING_NONE) sprctl |= SPRITE_TILED;