https://bugzilla.kernel.org/show_bug.cgi?id=208947
--- Comment #8 from Coleman Kane (ckane@colemankane.org) --- Update - below is the finding from git bisect:
471c1dd9546df81d259664ac3e2ab0e99169f755 is the first bad commit commit 471c1dd9546df81d259664ac3e2ab0e99169f755 Author: Reza Amini Reza.Amini@amd.com Date: Wed Jul 15 11:33:23 2020 -0400
drm/amd/display: Allow asic specific FSFT timing optimization
[Why] Each asic can optimize best based on its capabilities
[How] Optimizing timing for a new pixel clock
Signed-off-by: Reza Amini Reza.Amini@amd.com Reviewed-by: Anthony Koo Anthony.Koo@amd.com Acked-by: Eryk Brol eryk.brol@amd.com Signed-off-by: Alex Deucher alexander.deucher@amd.com
drivers/gpu/drm/amd/display/dc/core/dc_stream.c | 18 +++++++-------- drivers/gpu/drm/amd/display/dc/dc_stream.h | 4 ++-- drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c | 27 ++++++++++++++++++++++ drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.h | 5 ++++ drivers/gpu/drm/amd/display/dc/dcn20/dcn20_init.c | 3 +++ drivers/gpu/drm/amd/display/dc/dcn21/dcn21_init.c | 3 +++ drivers/gpu/drm/amd/display/dc/inc/hw_sequencer.h | 5 ++++ .../drm/amd/display/modules/freesync/freesync.c | 5 +++- 8 files changed, 57 insertions(+), 13 deletions(-)