It updates i915_gem_ctx to i915_gem_ww_ctx and adds missing indefinite article to doc.
Signed-off-by: Gwan-gyeong Mun gwan-gyeong.mun@intel.com --- Documentation/gpu/i915.rst | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/Documentation/gpu/i915.rst b/Documentation/gpu/i915.rst index bcaefc952764..806454296b52 100644 --- a/Documentation/gpu/i915.rst +++ b/Documentation/gpu/i915.rst @@ -275,7 +275,7 @@ An Intel GPU has multiple engines. There are several engine types. space. - VCS is a video encode and decode engine, this is named `I915_EXEC_BSD` in user space -- VECS is video enhancement engine, this is named `I915_EXEC_VEBOX` in user +- VECS is a video enhancement engine, this is named `I915_EXEC_VEBOX` in user space. - The enumeration `I915_EXEC_DEFAULT` does not refer to specific engine; instead it is to be used by user space to specify a default rendering @@ -346,7 +346,7 @@ Locking Guidelines #. No struct_mutex anywhere in the code
#. dma_resv will be the outermost lock (when needed) and ww_acquire_ctx - is to be hoisted at highest level and passed down within i915_gem_ctx + is to be hoisted at highest level and passed down within i915_gem_ww_ctx in the call chain
#. While holding lru/memory manager (buddy, drm_mm, whatever) locks