Add Plane color capabilties, support for degamma and gamma added.
Signed-off-by: Uma Shankar uma.shankar@intel.com --- drivers/gpu/drm/i915/intel_color.c | 12 +++++------- drivers/gpu/drm/i915/intel_display.c | 4 ++-- drivers/gpu/drm/i915/intel_drv.h | 3 ++- drivers/gpu/drm/i915/intel_sprite.c | 11 +++++++++-- 4 files changed, 18 insertions(+), 12 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_color.c b/drivers/gpu/drm/i915/intel_color.c index b56c3999..afb1d00 100644 --- a/drivers/gpu/drm/i915/intel_color.c +++ b/drivers/gpu/drm/i915/intel_color.c @@ -930,7 +930,8 @@ int intel_color_check(struct intel_crtc_state *crtc_state) return 0; }
-void intel_plane_color_init(struct drm_plane *plane) +void intel_plane_color_init(struct drm_plane *plane, u32 degamma_lut_size, + u32 gamma_lut_size) { struct drm_i915_private *dev_priv = to_i915(plane->dev);
@@ -941,12 +942,9 @@ void intel_plane_color_init(struct drm_plane *plane) drm_plane_color_create_prop(plane->dev, plane);
/* Enable color management support when we have degamma or gamma LUTs. */ - if (INTEL_INFO(dev_priv)->plane_color.plane_degamma_lut_size != 0 || - INTEL_INFO(dev_priv)->plane_color.plane_gamma_lut_size != 0) - drm_plane_enable_color_mgmt(plane, - INTEL_INFO(dev_priv)->plane_color.plane_degamma_lut_size, - true, - INTEL_INFO(dev_priv)->plane_color.plane_gamma_lut_size); + if (degamma_lut_size != 0 || gamma_lut_size != 0) + drm_plane_enable_color_mgmt(plane, degamma_lut_size, + true, gamma_lut_size); }
void intel_color_init(struct intel_crtc *crtc) diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index 2775c3f..fc43c37 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -14413,8 +14413,8 @@ static bool i9xx_plane_has_fbc(struct drm_i915_private *dev_priv, supported_rotations);
/* Add Plane Color properties */ - if (IS_BROADWELL(dev_priv) || INTEL_GEN(dev_priv) >= 9) - intel_plane_color_init(&plane->base); + if (IS_BROADWELL(dev_priv)) + intel_plane_color_init(&plane->base, 0, 16);
drm_plane_helper_add(&plane->base, &intel_plane_helper_funcs);
diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h index a17e6a4..3a68191 100644 --- a/drivers/gpu/drm/i915/intel_drv.h +++ b/drivers/gpu/drm/i915/intel_drv.h @@ -2544,7 +2544,8 @@ int intel_plane_atomic_check_with_state(const struct intel_crtc_state *old_crtc_ int intel_color_check(struct intel_crtc_state *crtc_state); void intel_color_commit(const struct intel_crtc_state *crtc_state); void intel_color_load_luts(const struct intel_crtc_state *crtc_state); -void intel_plane_color_init(struct drm_plane *plane); +void intel_plane_color_init(struct drm_plane *plane, u32 degamma_lut_size, + u32 gamma_lut_size); void intel_color_load_plane_luts(const struct drm_plane_state *plane_state);
/* intel_lspcon.c */ diff --git a/drivers/gpu/drm/i915/intel_sprite.c b/drivers/gpu/drm/i915/intel_sprite.c index 766e03e..41fdc12 100644 --- a/drivers/gpu/drm/i915/intel_sprite.c +++ b/drivers/gpu/drm/i915/intel_sprite.c @@ -2334,8 +2334,15 @@ struct intel_plane * BIT(DRM_MODE_BLEND_COVERAGE));
/* Add Plane Color properties */ - if (IS_BROADWELL(dev_priv) || INTEL_GEN(dev_priv) >= 9) - intel_plane_color_init(&plane->base); + if (INTEL_GEN(dev_priv) <= 10) + intel_plane_color_init(&plane->base, 0, 16); + + if (INTEL_GEN(dev_priv) >= 11) { + if (icl_is_hdr_plane(dev_priv, plane_id)) + intel_plane_color_init(&plane->base, 128, 33); + else + intel_plane_color_init(&plane->base, 33, 33); + }
drm_plane_helper_add(&plane->base, &intel_plane_helper_funcs);