On Thu, Aug 22, 2019 at 5:44 AM Guido Günther agx@sigxcpu.org wrote:
The Northwest Logic MIPI DSI IP core can be found in NXPs i.MX8 SoCs.
Signed-off-by: Guido Günther agx@sigxcpu.org
.../bindings/display/bridge/nwl-dsi.yaml | 155 ++++++++++++++++++ 1 file changed, 155 insertions(+) create mode 100644 Documentation/devicetree/bindings/display/bridge/nwl-dsi.yaml
diff --git a/Documentation/devicetree/bindings/display/bridge/nwl-dsi.yaml b/Documentation/devicetree/bindings/display/bridge/nwl-dsi.yaml new file mode 100644 index 000000000000..24d17a6310dc --- /dev/null +++ b/Documentation/devicetree/bindings/display/bridge/nwl-dsi.yaml @@ -0,0 +1,155 @@ +# SPDX-License-Identifier: GPL-2.0
(GPL-2.0-only OR BSD-2-Clause) is preferred for new bindings.
+%YAML 1.2 +--- +$id: http://devicetree.org/schemas/display/bridge/nwl-dsi.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml#
+title: Northwest Logic MIPI-DSI controller on i.MX SoCs
+maintainers:
- Guido Gúnther agx@sigxcpu.org
- Robert Chiras robert.chiras@nxp.com
+description: |
- NWL MIPI-DSI host controller found on i.MX8 platforms. This is a dsi bridge for
- the SOCs NWL MIPI-DSI host controller.
+properties:
- compatible:
- const: fsl,imx8mq-nwl-dsi
- reg:
- maxItems: 1
- interrupts:
- maxItems: 1
- clocks:
- items:
- description: DSI core clock
- description: RX_ESC clock (used in escape mode)
- description: TX_ESC clock (used in escape mode)
- description: PHY_REF clock
- clock-names:
- items:
- const: core
- const: rx_esc
- const: tx_esc
- const: phy_ref
- mux-controls:
- description:
mux controller node to use for operating the input mux
- phys:
- maxItems: 1
- description:
A phandle to the phy module representing the DPHY
- phy-names:
- items:
- const: dphy
- power-domains:
- maxItems: 1
- description:
A phandle to the power domain
Don't need a description for common properties unless you have something specific about this device to say.
- resets:
- description:
phandles to the reset controller
Same here.
- items:
- description: dsi byte reset line
- description: dsi dpi reset line
- description: dsi esc reset line
- description: dsi pclk reset line
- reset-names:
- items:
- const: byte
- const: dpi
- const: esc
- const: pclk
- ports:
- type: object
- description:
A node containing DSI input & output port nodes with endpoint
definitions as documented in
Documentation/devicetree/bindings/graph.txt.
- port@0:
These are child nodes of ports. So under ports you need 'properties' with these. And 'required'.
- type: object
- description:
Input port node to receive pixel data from the
display controller
- port@1:
- type: object
- description:
DSI output port node to the panel or the next bridge
in the chain
+patternProperties:
- "^panel@[0-9]+$": true
This is a node, so:
type: object
+required:
- clock-names
- clocks
- compatible
- interrupts
- mux-controls
- phy-names
- phys
- ports
- reg
- reset-names
- resets
Add a:
additionalProperties: false
+examples:
- |
- mipi_dsi: mipi_dsi@30a00000 {
#address-cells = <1>;
#size-cells = <0>;
These need to be listed above.
compatible = "fsl,imx8mq-nwl-dsi";
reg = <0x30A00000 0x300>;
clocks = <&clk 163>, <&clk 244>, <&clk 245>, <&clk 164>;
clock-names = "core", "rx_esc", "tx_esc", "phy_ref";
interrupts = <0 34 4>;
mux-controls = <&mux 0>;
power-domains = <&pgc_mipi>;
resets = <&src 0>, <&src 1>, <&src 2>, <&src 3>;
reset-names = "byte", "dpi", "esc", "pclk";
phys = <&dphy>;
phy-names = "dphy";
panel@0 {
compatible = "rocktech,jh057n00900";
reg = <0>;
port@0 {
panel_in: endpoint {
remote-endpoint = <&mipi_dsi_out>;
};
};
};
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
mipi_dsi_in: endpoint {
remote-endpoint = <&lcdif_mipi_dsi>;
};
};
port@1 {
reg = <1>;
mipi_dsi_out: endpoint {
remote-endpoint = <&panel_in>;
};
};
};
};
-- 2.20.1