Seems so far not to be required, at least for gpu. Just stuffing it in a patch since I wrote the code and someone might want to resurrect this at some later time.
Signed-off-by: Rob Clark robdclark@gmail.com --- drivers/firmware/qcom_scm-32.c | 32 +++++++++++++++++++++++++ drivers/firmware/qcom_scm-64.c | 10 ++++++++ drivers/firmware/qcom_scm.c | 54 ++++++++++++++++++++++++++++++++++++++++++ drivers/firmware/qcom_scm.h | 4 ++++ include/linux/qcom_scm.h | 4 ++++ 5 files changed, 104 insertions(+)
diff --git a/drivers/firmware/qcom_scm-32.c b/drivers/firmware/qcom_scm-32.c index 656d8fe..287041a 100644 --- a/drivers/firmware/qcom_scm-32.c +++ b/drivers/firmware/qcom_scm-32.c @@ -557,6 +557,38 @@ int __qcom_scm_ocmem_unlock(uint32_t id, uint32_t offset, uint32_t size) &request, sizeof(request), NULL, 0); }
+int __qcom_scm_ocmem_enable_dump(uint32_t id, uint32_t offset, uint32_t size) +{ + struct ocmem_tz_en_dump { + u32 id; + u32 offset; + u32 size; + } request; + + request.id = id; + request.offset = offset; + request.size = size; + + return qcom_scm_call(QCOM_SCM_OCMEM_SVC, QCOM_SCM_OCMEM_ENABLE_DUMP_CMD, + &request, sizeof(request), NULL, 0); +} + +int __qcom_scm_ocmem_disable_dump(uint32_t id, uint32_t offset, uint32_t size) +{ + struct ocmem_tz_dis_dump { + u32 id; + u32 offset; + u32 size; + } request; + + request.id = id; + request.offset = offset; + request.size = size; + + return qcom_scm_call(QCOM_SCM_OCMEM_SVC, QCOM_SCM_OCMEM_DISABLE_DUMP_CMD, + &request, sizeof(request), NULL, 0); +} + bool __qcom_scm_pas_supported(u32 peripheral) { __le32 out; diff --git a/drivers/firmware/qcom_scm-64.c b/drivers/firmware/qcom_scm-64.c index ef5c59e..fc02828 100644 --- a/drivers/firmware/qcom_scm-64.c +++ b/drivers/firmware/qcom_scm-64.c @@ -78,6 +78,16 @@ int __qcom_scm_ocmem_unlock(uint32_t id, uint32_t offset, uint32_t size) return -ENOTSUPP; }
+int __qcom_scm_ocmem_enable_dump(uint32_t id, uint32_t offset, uint32_t size) +{ + return -ENOTSUPP; +} + +int __qcom_scm_ocmem_disable_dump(uint32_t id, uint32_t offset, uint32_t size) +{ + return -ENOTSUPP; +} + bool __qcom_scm_pas_supported(u32 peripheral) { return false; diff --git a/drivers/firmware/qcom_scm.c b/drivers/firmware/qcom_scm.c index 59b1007..b15b0d8 100644 --- a/drivers/firmware/qcom_scm.c +++ b/drivers/firmware/qcom_scm.c @@ -260,6 +260,60 @@ int qcom_scm_ocmem_unlock(uint32_t id, uint32_t offset, uint32_t size) EXPORT_SYMBOL(qcom_scm_ocmem_unlock);
/** + * + */ +bool qcom_scm_ocmem_dump_available(void) +{ + int ret = qcom_scm_clk_enable(); + + if (ret) + goto clk_err; + + ret = __qcom_scm_is_call_available(QCOM_SCM_OCMEM_SVC, + QCOM_SCM_OCMEM_ENABLE_DUMP_CMD); + + qcom_scm_clk_disable(); + +clk_err: + return (ret > 0) ? true : false; +} +EXPORT_SYMBOL(qcom_scm_ocmem_dump_available); + +/** + * + */ +int qcom_scm_ocmem_enable_dump(uint32_t id, uint32_t offset, uint32_t size) +{ + int ret = qcom_scm_clk_enable(); + + if (ret) + return ret; + + ret = __qcom_scm_ocmem_enable_dump(id, offset, size); + qcom_scm_clk_disable(); + + return ret; +} +EXPORT_SYMBOL(qcom_scm_ocmem_enable_dump); + +/** + * + */ +int qcom_scm_ocmem_disable_dump(uint32_t id, uint32_t offset, uint32_t size) +{ + int ret = qcom_scm_clk_enable(); + + if (ret) + return ret; + + ret = __qcom_scm_ocmem_disable_dump(id, offset, size); + qcom_scm_clk_disable(); + + return ret; +} +EXPORT_SYMBOL(qcom_scm_ocmem_disable_dump); + +/** * qcom_scm_pas_supported() - Check if the peripheral authentication service is * available for the given peripherial * @peripheral: peripheral id diff --git a/drivers/firmware/qcom_scm.h b/drivers/firmware/qcom_scm.h index e01656f3..a090236 100644 --- a/drivers/firmware/qcom_scm.h +++ b/drivers/firmware/qcom_scm.h @@ -44,10 +44,14 @@ extern int __qcom_scm_ocmem_secure_cfg(unsigned sec_id); #define QCOM_SCM_OCMEM_SVC 0xf #define QCOM_SCM_OCMEM_LOCK_CMD 0x1 #define QCOM_SCM_OCMEM_UNLOCK_CMD 0x2 +#define QCOM_SCM_OCMEM_ENABLE_DUMP_CMD 0x3 +#define QCOM_SCM_OCMEM_DISABLE_DUMP_CMD 0x4
extern int __qcom_scm_ocmem_lock(uint32_t id, uint32_t offset, uint32_t size, uint32_t mode); extern int __qcom_scm_ocmem_unlock(uint32_t id, uint32_t offset, uint32_t size); +extern int __qcom_scm_ocmem_enable_dump(uint32_t id, uint32_t offset, uint32_t size); +extern int __qcom_scm_ocmem_disable_dump(uint32_t id, uint32_t offset, uint32_t size);
#define QCOM_SCM_SVC_PIL 0x2 #define QCOM_SCM_PAS_INIT_IMAGE_CMD 0x1 diff --git a/include/linux/qcom_scm.h b/include/linux/qcom_scm.h index a934457..bdbbbdf 100644 --- a/include/linux/qcom_scm.h +++ b/include/linux/qcom_scm.h @@ -37,6 +37,10 @@ extern int qcom_scm_ocmem_lock(uint32_t id, uint32_t offset, uint32_t size, uint32_t mode); extern int qcom_scm_ocmem_unlock(uint32_t id, uint32_t offset, uint32_t size);
+extern bool qcom_scm_ocmem_dump_available(void); +extern int qcom_scm_ocmem_enable_dump(uint32_t id, uint32_t offset, uint32_t size); +extern int qcom_scm_ocmem_disable_dump(uint32_t id, uint32_t offset, uint32_t size); + extern bool qcom_scm_pas_supported(u32 peripheral); extern int qcom_scm_pas_init_image(u32 peripheral, const void *metadata, size_t size); extern int qcom_scm_pas_mem_setup(u32 peripheral, phys_addr_t addr, phys_addr_t size);