From: Sean Paul seanpaul@chromium.org
Currently we rely on intel_hdcp_disable() to disable HDCP signalling in the DDI Function Control register. This patch adds a safety net by also clearing the bit when we disable the transcoder.
Once we have HDCP over MST and disappearing connectors, we want to make sure that the signalling is truly disabled even if HDCP teardown doesn't go as planned.
Signed-off-by: Sean Paul seanpaul@chromium.org --- drivers/gpu/drm/i915/display/intel_ddi.c | 13 ++++++------- 1 file changed, 6 insertions(+), 7 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c index b51f244ad7a5..e8ac98a8ee7f 100644 --- a/drivers/gpu/drm/i915/display/intel_ddi.c +++ b/drivers/gpu/drm/i915/display/intel_ddi.c @@ -1952,13 +1952,12 @@ void intel_ddi_disable_transcoder_func(const struct intel_crtc_state *crtc_state i915_reg_t reg = TRANS_DDI_FUNC_CTL(cpu_transcoder); u32 val = I915_READ(reg);
- if (INTEL_GEN(dev_priv) >= 12) { - val &= ~(TRANS_DDI_FUNC_ENABLE | TGL_TRANS_DDI_PORT_MASK | - TRANS_DDI_DP_VC_PAYLOAD_ALLOC); - } else { - val &= ~(TRANS_DDI_FUNC_ENABLE | TRANS_DDI_PORT_MASK | - TRANS_DDI_DP_VC_PAYLOAD_ALLOC); - } + val &= ~(TRANS_DDI_FUNC_ENABLE | TRANS_DDI_DP_VC_PAYLOAD_ALLOC | + TRANS_DDI_HDCP_SIGNALLING); + if (INTEL_GEN(dev_priv) >= 12) + val &= ~TGL_TRANS_DDI_PORT_MASK; + else + val &= ~TRANS_DDI_PORT_MASK; I915_WRITE(reg, val);
if (dev_priv->quirks & QUIRK_INCREASE_DDI_DISABLED_TIME &&