On Fri, May 27, 2022 at 11:39:03AM +0800, 1064094935@qq.com wrote:
From: pengfuyuan pengfuyuan@kylinos.cn
Fix spelling typo in comments.
Reported-by: k2ci kernel-bot@kylinos.cn Signed-off-by: pengfuyuan pengfuyuan@kylinos.cn
Acked-by: Liviu Dudau liviu.dudau@arm.com
I've got only patch 1 of 5, so I'm going to assume that you're going to get the series merged via some other way. If that's not the case, please let me know.
Best regards, Liviu
drivers/gpu/drm/arm/display/komeda/komeda_pipeline_state.c | 2 +- drivers/gpu/drm/arm/malidp_regs.h | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/arm/display/komeda/komeda_pipeline_state.c b/drivers/gpu/drm/arm/display/komeda/komeda_pipeline_state.c index e672b9cffee3..3276a3e82c62 100644 --- a/drivers/gpu/drm/arm/display/komeda/komeda_pipeline_state.c +++ b/drivers/gpu/drm/arm/display/komeda/komeda_pipeline_state.c @@ -1271,7 +1271,7 @@ int komeda_release_unclaimed_resources(struct komeda_pipeline *pipe, return 0; }
-/* Since standalong disabled components must be disabled separately and in the +/* Since standalone disabled components must be disabled separately and in the
- last, So a complete disable operation may needs to call pipeline_disable
- twice (two phase disabling).
- Phase 1: disable the common components, flush it.
diff --git a/drivers/gpu/drm/arm/malidp_regs.h b/drivers/gpu/drm/arm/malidp_regs.h index 514c50dcb74d..59f63cc2b304 100644 --- a/drivers/gpu/drm/arm/malidp_regs.h +++ b/drivers/gpu/drm/arm/malidp_regs.h @@ -145,7 +145,7 @@ #define MALIDP_SE_COEFFTAB_DATA_MASK 0x3fff #define MALIDP_SE_SET_COEFFTAB_DATA(x) \ ((x) & MALIDP_SE_COEFFTAB_DATA_MASK) -/* Enhance coeffents reigster offset */ +/* Enhance coeffents register offset */ #define MALIDP_SE_IMAGE_ENH 0x3C /* ENH_LIMITS offset 0x0 */
#define MALIDP_SE_ENH_LOW_LEVEL 24
2.25.1
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