Some new display-controllers are need to set write-masks to enable writes to interrupt registers. Allow this to be set on a per-vop basis.
Signed-off-by: Yakir Yang ykk@rock-chips.com --- Changes in v2: - Add this patch in v2 (Heiko)
drivers/gpu/drm/rockchip/rockchip_drm_vop.c | 7 +++++-- drivers/gpu/drm/rockchip/rockchip_drm_vop.h | 1 + drivers/gpu/drm/rockchip/rockchip_vop_reg.c | 2 ++ 3 files changed, 8 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c index d83bf87..3c83097 100644 --- a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c +++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c @@ -63,9 +63,12 @@ #define VOP_INTR_SET_TYPE(vop, name, type, v) \ do { \ int i, reg = 0; \ - for (i = 0; i < vop->data->intr->nintrs; i++) { \ - if (vop->data->intr->intrs[i] & type) \ + const struct vop_intr *intr = vop->data->intr; \ + for (i = 0; i < intr->nintrs; i++) { \ + if (intr->intrs[i] & type) { \ reg |= (v) << i; \ + reg |= intr->write_mask ? (1 << (i + 16)) : 0; \ + } \ } \ VOP_INTR_SET(vop, name, reg); \ } while (0) diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop.h b/drivers/gpu/drm/rockchip/rockchip_drm_vop.h index 071ff0b..f1bb84d 100644 --- a/drivers/gpu/drm/rockchip/rockchip_drm_vop.h +++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop.h @@ -60,6 +60,7 @@ struct vop_ctrl { };
struct vop_intr { + bool write_mask; const int *intrs; uint32_t nintrs; struct vop_reg enable; diff --git a/drivers/gpu/drm/rockchip/rockchip_vop_reg.c b/drivers/gpu/drm/rockchip/rockchip_vop_reg.c index 3166b46..7fbaf76 100644 --- a/drivers/gpu/drm/rockchip/rockchip_vop_reg.c +++ b/drivers/gpu/drm/rockchip/rockchip_vop_reg.c @@ -174,6 +174,7 @@ static const int rk3288_vop_intrs[] = { };
static const struct vop_intr rk3288_vop_intr = { + .write_mask = false, .intrs = rk3288_vop_intrs, .nintrs = ARRAY_SIZE(rk3288_vop_intrs), .status = VOP_REG(RK3288_INTR_CTRL0, 0xf, 0), @@ -240,6 +241,7 @@ static const int rk3036_vop_intrs[] = { };
static const struct vop_intr rk3036_intr = { + .write_mask = false, .intrs = rk3036_vop_intrs, .nintrs = ARRAY_SIZE(rk3036_vop_intrs), .status = VOP_REG(RK3036_INT_STATUS, 0xf, 0),