Hello Flora Cui,
The patch 2cc0c0b5cd4d: "drm/amdgpu: change ELM/BAF to Polaris10/Polaris11" from Mar 14, 2016, leads to the following static checker warning:
drivers/gpu/drm/amd/amdgpu/../powerplay/hwmgr/polaris10_hwmgr.c:3620 polaris10_get_pp_table_entry_callback_func() warn: buffer overflow 'polaris10_power_state->performance_levels' 2 <= 7
drivers/gpu/drm/amd/amdgpu/../powerplay/hwmgr/polaris10_hwmgr.c
3592 power_state->temperatures.min = 0; 3593 power_state->temperatures.max = 0; 3594 3595 performance_level = &(polaris10_power_state->performance_levels 3596 [polaris10_power_state->performance_level_count++]); ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ 3597 3598 PP_ASSERT_WITH_CODE( 3599 (polaris10_power_state->performance_level_count < SMU74_MAX_LEVELS_GRAPHICS), ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ SMU74_MAX_LEVELS_GRAPHICS is 8 but ->performance_levels[] has POLARIS10_MAX_HARDWARE_POWERLEVELS which is 2 elements. What's the disconnect?
3600 "Performance levels exceeds SMC limit!", 3601 return -1); 3602 3603 PP_ASSERT_WITH_CODE( 3604 (polaris10_power_state->performance_level_count <= 3605 hwmgr->platform_descriptor.hardwareActivityPerformanceLevels), 3606 "Performance levels exceeds Driver limit!", 3607 return -1); 3608 3609 /* Performance levels are arranged from low to high. */ 3610 performance_level->memory_clock = mclk_dep_table->entries 3611 [state_entry->ucMemoryClockIndexLow].ulMclk; 3612 performance_level->engine_clock = sclk_dep_table->entries 3613 [state_entry->ucEngineClockIndexLow].ulSclk; 3614 performance_level->pcie_gen = get_pcie_gen_support(data->pcie_gen_cap, 3615 state_entry->ucPCIEGenLow); 3616 performance_level->pcie_lane = get_pcie_lane_support(data->pcie_lane_cap, 3617 state_entry->ucPCIELaneHigh); 3618 3619 performance_level = &(polaris10_power_state->performance_levels 3620 [polaris10_power_state->performance_level_count++]);
regards, dan carpenter