Re: [PATCH v7 2/2] drm/panel: Add Feiyang FY07024DI26A30-D MIPI-DSI LCD panel

Hi Thierry and Sam,

On Wed, Feb 13, 2019 at 2:11 AM Jagan Teki jagan@amarulasolutions.com wrote:

Feiyang FY07024DI26A30-D is 1024x600, 4-lane MIPI-DSI LCD panel.

Add panel driver for it.

Signed-off-by: Jagan Teki jagan@amarulasolutions.com Reviewed-by: Sam Ravnborg sam@ravnborg.org Tested-by: Bhushan Shah bshah@kde.org Tested-by: Merlijn Wajer merlijn@wizzup.org

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Changes for v7:

• rebase on master
• collect Merlijn Tested-by
• add tabs about drm timings

Changes for v6:

• add space b/w msleep and comment line
• use multi comment line style
• add sentinel
• collect Sam Ravnborg Reviewed-by

Changes for v5:

• drop drmP.h header
• order include files
• add empty line after kzalloc()
• drop gpio set for reset
• drop backlight put_device from probe()
• drop backlight put_device from remove()
• collect Tested-by from Bhushan Shah

Changes for v4:

• rebase on master
• adjust the hporch values to satisfy the refresh

Changes for v3:

• use simple structure for command init
• update proper comments on power, reset delay sequnce
• fix to use set_display_off in disable function
• move mode type to structure
• drop refres rate value, let drm compute

Changes for v2:

• new patch, derived from another dsi series

Pleas let me know if you any further comments on this?