This IP requires full stop and re-start when changing display timings, but we can change the pixel format while running.
Signed-off-by: Robert Chiras robert.chiras@nxp.com --- drivers/gpu/drm/mxsfb/mxsfb_crtc.c | 16 +++++++++++++++- 1 file changed, 15 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/mxsfb/mxsfb_crtc.c b/drivers/gpu/drm/mxsfb/mxsfb_crtc.c index 317575e..5607fc0 100644 --- a/drivers/gpu/drm/mxsfb/mxsfb_crtc.c +++ b/drivers/gpu/drm/mxsfb/mxsfb_crtc.c @@ -494,6 +494,7 @@ void mxsfb_plane_atomic_update(struct mxsfb_drm_private *mxsfb, struct drm_crtc *crtc = &pipe->crtc; struct drm_plane_state *new_state = pipe->plane.state; struct drm_framebuffer *fb = pipe->plane.state->fb; + struct drm_framebuffer *old_fb = state->fb; struct drm_pending_vblank_event *event; u32 fb_addr, src_off, src_w, stride, cpp = 0;
@@ -510,7 +511,7 @@ void mxsfb_plane_atomic_update(struct mxsfb_drm_private *mxsfb, } spin_unlock_irq(&crtc->dev->event_lock);
- if (!fb) + if (!fb || !old_fb) return;
fb_addr = mxsfb_get_fb_paddr(mxsfb); @@ -533,4 +534,17 @@ void mxsfb_plane_atomic_update(struct mxsfb_drm_private *mxsfb, src_w = new_state->src_w >> 16; mxsfb_set_fb_hcrop(mxsfb, src_w, stride); } + + if (old_fb->format->format != fb->format->format) { + struct drm_format_name_buf old_fmt_buf; + struct drm_format_name_buf new_fmt_buf; + + DRM_DEV_DEBUG_DRIVER(crtc->dev->dev, + "Switching pixel format: %s -> %s\n", + drm_get_format_name(old_fb->format->format, + &old_fmt_buf), + drm_get_format_name(fb->format->format, + &new_fmt_buf)); + mxsfb_set_pixel_fmt(mxsfb, true); + } }