From: Michel Dänzer michel.daenzer@amd.com
We want to allocate small BOs strictly from the bottom up, just as large BOs are allocated strictly from the top down.
Signed-off-by: Michel Dänzer michel.daenzer@amd.com --- drivers/gpu/drm/radeon/radeon_object.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/radeon/radeon_object.c b/drivers/gpu/drm/radeon/radeon_object.c index d23b0dd..d9f7a02 100644 --- a/drivers/gpu/drm/radeon/radeon_object.c +++ b/drivers/gpu/drm/radeon/radeon_object.c @@ -180,9 +180,11 @@ void radeon_ttm_placement_from_domain(struct radeon_bo *rbo, u32 domain) * 512kb was measured as the most optimal number. */ if (rbo->tbo.mem.size > 512 * 1024) { - for (i = 0; i < c; i++) { + for (i = 0; i < c; i++) rbo->placements[i].flags |= TTM_PL_FLAG_TOPDOWN; - } + } else { + for (i = 0; i < c; i++) + rbo->placements[i].flags |= TTM_PL_FLAG_BOTTOMUP; } }