On Wed, Oct 24, 2012 at 12:28 PM, Egbert Eich eich@suse.de wrote:
TV DAC load detection did not take into account that there are chips with a single CRTC when attempted to enable the 2nd CRTC. This fix adds support for single CRTC chips and cleans up handling of different chipset generations.
I don't think this isn't quite right. CRTC_EXT_CNTL.CRTC_CRT_ON is the enable bit for the primary dac. CRTC2_GEN_CNTL.CRTC2_CRT2_ON is the enable bit for the tv dac. There are only two radeon variants with a single crtc: the original R100 and the RN50. The R100 did not have a TV dac, so this path is not relevant. The RN50 does have a TV DAC, but since it is based on RV100, it still has the relevant registers even if the second crtc is not fully functional.
Is there a specific bug this addresses?
Thanks,
Alex
Signed-off-by: Egbert Eich eich@suse.de
drivers/gpu/drm/radeon/radeon_legacy_encoders.c | 70 ++++++++++++++++------- 1 files changed, 50 insertions(+), 20 deletions(-)
diff --git a/drivers/gpu/drm/radeon/radeon_legacy_encoders.c b/drivers/gpu/drm/radeon/radeon_legacy_encoders.c index a13ad9d..2630e4e 100644 --- a/drivers/gpu/drm/radeon/radeon_legacy_encoders.c +++ b/drivers/gpu/drm/radeon/radeon_legacy_encoders.c @@ -679,6 +679,9 @@ static enum drm_connector_status radeon_legacy_primary_dac_detect(struct drm_enc if (RREG32(RADEON_DAC_CNTL) & RADEON_DAC_CMP_OUTPUT) found = connector_status_connected;
DRM_DEBUG_KMS("[%s]: Load detected: %s\n", drm_get_encoder_name(encoder),(found == connector_status_connected) ? "yes" : "no");/* restore the regs we used */ WREG32(RADEON_DAC_CNTL, dac_cntl); WREG32(RADEON_DAC_MACRO_CNTL, dac_macro_cntl);@@ -1419,7 +1422,8 @@ static enum drm_connector_status radeon_legacy_tv_dac_detect(struct drm_encoder struct drm_device *dev = encoder->dev; struct radeon_device *rdev = dev->dev_private; uint32_t crtc2_gen_cntl, tv_dac_cntl, dac_cntl2, dac_ext_cntl;
uint32_t disp_hw_debug, disp_output_cntl, gpiopad_a, pixclks_cntl, tmp;
uint32_t gpiopad_a, pixclks_cntl, tmp;uint32_t disp_output_cntl = 0, disp_hw_debug = 0, fp2_gen_cntl = 0, crtc_ext_cntl = 0; enum drm_connector_status found = connector_status_disconnected; struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); struct radeon_encoder_tv_dac *tv_dac = radeon_encoder->enc_priv;@@ -1459,8 +1463,17 @@ static enum drm_connector_status radeon_legacy_tv_dac_detect(struct drm_encoder /* save the regs we need */ pixclks_cntl = RREG32_PLL(RADEON_PIXCLKS_CNTL); gpiopad_a = ASIC_IS_R300(rdev) ? RREG32(RADEON_GPIOPAD_A) : 0;
disp_output_cntl = ASIC_IS_R300(rdev) ? RREG32(RADEON_DISP_OUTPUT_CNTL) : 0;disp_hw_debug = ASIC_IS_R300(rdev) ? 0 : RREG32(RADEON_DISP_HW_DEBUG);
if (rdev->flags & RADEON_SINGLE_CRTC) {crtc_ext_cntl = RREG32(RADEON_CRTC_EXT_CNTL);} else {if (ASIC_IS_R300(rdev)) {disp_output_cntl = RREG32(RADEON_DISP_OUTPUT_CNTL);} else if (rdev->family == CHIP_R200) {fp2_gen_cntl = RREG32(RADEON_FP2_GEN_CNTL);} else {disp_hw_debug = RREG32(RADEON_DISP_HW_DEBUG);}} crtc2_gen_cntl = RREG32(RADEON_CRTC2_GEN_CNTL); tv_dac_cntl = RREG32(RADEON_TV_DAC_CNTL); dac_ext_cntl = RREG32(RADEON_DAC_EXT_CNTL);@@ -1473,19 +1486,28 @@ static enum drm_connector_status radeon_legacy_tv_dac_detect(struct drm_encoder if (ASIC_IS_R300(rdev)) WREG32_P(RADEON_GPIOPAD_A, 1, ~1);
tmp = crtc2_gen_cntl & ~RADEON_CRTC2_PIX_WIDTH_MASK;tmp |= RADEON_CRTC2_CRT2_ON |(2 << RADEON_CRTC2_PIX_WIDTH_SHIFT);WREG32(RADEON_CRTC2_GEN_CNTL, tmp);if (ASIC_IS_R300(rdev)) {tmp = disp_output_cntl & ~RADEON_DISP_TVDAC_SOURCE_MASK;tmp |= RADEON_DISP_TVDAC_SOURCE_CRTC2;WREG32(RADEON_DISP_OUTPUT_CNTL, tmp);
if (rdev->flags & RADEON_SINGLE_CRTC) {tmp = crtc_ext_cntl | RADEON_CRTC_CRT_ON;WREG32(RADEON_CRTC_EXT_CNTL, tmp); } else {
tmp = disp_hw_debug & ~RADEON_CRT2_DISP1_SEL;WREG32(RADEON_DISP_HW_DEBUG, tmp);
if (ASIC_IS_R300(rdev)) {tmp = disp_output_cntl & ~RADEON_DISP_TVDAC_SOURCE_MASK;tmp |= RADEON_DISP_TVDAC_SOURCE_CRTC2;WREG32(RADEON_DISP_OUTPUT_CNTL, tmp);} else if (rdev->family == CHIP_R200) {tmp = fp2_gen_cntl & ~(R200_FP2_SOURCE_SEL_MASK |RADEON_FP2_DVO_RATE_SEL_SDR);tmp |= RADEON_DISP_TV_PATH_SRC_CRTC2;WREG32(RADEON_FP2_GEN_CNTL, tmp);} else {tmp = disp_hw_debug & ~RADEON_CRT2_DISP1_SEL;WREG32(RADEON_DISP_HW_DEBUG, tmp);}tmp = crtc2_gen_cntl & ~RADEON_CRTC2_PIX_WIDTH_MASK;tmp |= RADEON_CRTC2_CRT2_ON |(2 << RADEON_CRTC2_PIX_WIDTH_SHIFT);WREG32(RADEON_CRTC2_GEN_CNTL, tmp); } tmp = RADEON_TV_DAC_NBLANK |@@ -1523,17 +1545,25 @@ static enum drm_connector_status radeon_legacy_tv_dac_detect(struct drm_encoder found = connector_status_connected; }
DRM_DEBUG_KMS("[%s]: Load detected: %s\n", drm_get_encoder_name(encoder),(found == connector_status_connected) ? "yes" : "no");/* restore regs we used */ WREG32(RADEON_DAC_CNTL2, dac_cntl2); WREG32(RADEON_DAC_EXT_CNTL, dac_ext_cntl); WREG32(RADEON_TV_DAC_CNTL, tv_dac_cntl); WREG32(RADEON_CRTC2_GEN_CNTL, crtc2_gen_cntl);
if (ASIC_IS_R300(rdev)) {WREG32(RADEON_DISP_OUTPUT_CNTL, disp_output_cntl);WREG32_P(RADEON_GPIOPAD_A, gpiopad_a, ~1);
if (rdev->flags & RADEON_SINGLE_CRTC) {WREG32(RADEON_CRTC_EXT_CNTL, crtc_ext_cntl); } else {
WREG32(RADEON_DISP_HW_DEBUG, disp_hw_debug);
if (ASIC_IS_R300(rdev)) {WREG32(RADEON_DISP_OUTPUT_CNTL, disp_output_cntl);WREG32_P(RADEON_GPIOPAD_A, gpiopad_a, ~1);} else if (rdev->family == CHIP_R200) {WREG32(RADEON_FP2_GEN_CNTL, fp2_gen_cntl);} else {WREG32(RADEON_DISP_HW_DEBUG, disp_hw_debug);} } WREG32_PLL(RADEON_PIXCLKS_CNTL, pixclks_cntl);-- 1.7.6.3