make the default behavior less verbose.
Signed-off-by: Alex Deucher alexander.deucher@amd.com --- drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c | 11 +++++------ 1 file changed, 5 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c index 8b9f432..d26c80f 100644 --- a/drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c @@ -943,7 +943,7 @@ static void gfx_v6_0_setup_rb(struct amdgpu_device *adev, }
adev->gfx.config.backend_enable_mask = enabled_rbs; - DRM_INFO("amdgpu: enabled_rbs %d \n", enabled_rbs); + DRM_DEBUG("amdgpu: enabled_rbs %d \n", enabled_rbs); adev->gfx.config.num_rbs = hweight32(enabled_rbs);
for (i = 0; i < se_num; i++) { @@ -1015,7 +1015,7 @@ static void gfx_v6_0_setup_spi(struct amdgpu_device *adev, } } } - DRM_INFO("amdgpu: setup_spi--active_cu %d \n", active_cu); + DRM_DEBUG("amdgpu: setup_spi--active_cu %d \n", active_cu); gfx_v6_0_select_se_sh(adev, 0xffffffff, 0xffffffff); }
@@ -1259,8 +1259,8 @@ static int gfx_v6_0_ring_test_ring(struct amdgpu_ring *ring) amdgpu_gfx_scratch_free(adev, scratch); return r; } - DRM_INFO("amdgpu: scratch %x \n", scratch); - DRM_INFO("amdgpu: REG_START %x \n", PACKET3_SET_CONFIG_REG_START); + DRM_DEBUG("amdgpu: scratch %x \n", scratch); + DRM_DEBUG("amdgpu: REG_START %x \n", PACKET3_SET_CONFIG_REG_START); amdgpu_ring_write(ring, PACKET3(PACKET3_SET_CONFIG_REG, 1)); amdgpu_ring_write(ring, (scratch - PACKET3_SET_CONFIG_REG_START)); amdgpu_ring_write(ring, 0xDEADBEEF); @@ -2840,7 +2840,6 @@ static int gfx_v6_0_sw_init(void *handle) return r; }
- DRM_INFO("amdgpu: gfx_v6_sw_init_end \n"); return r; }
@@ -3076,7 +3075,7 @@ static int gfx_v6_0_eop_irq(struct amdgpu_device *adev, struct amdgpu_irq_src *source, struct amdgpu_iv_entry *entry) { - DRM_INFO("IH: CP EOP ring %d\n", entry->ring_id); + DRM_DEBUG("IH: CP EOP ring %d\n", entry->ring_id);
switch (entry->ring_id) { case 0: