The CRTC connect handler checks whether the DSS output supports the DISPC channel assigned to it. As the channel is assigned to the output by the output driver a failure there could only result from a driver bug. All the output drivers have been verified and they are always assigned a DISPC channel that is supported on the SoC they run on. The check can thus be removed.
Signed-off-by: Laurent Pinchart laurent.pinchart@ideasonboard.com --- drivers/gpu/drm/omapdrm/dss/dispc.c | 8 -------- drivers/gpu/drm/omapdrm/dss/dss.c | 6 ------ drivers/gpu/drm/omapdrm/dss/dss.h | 2 -- drivers/gpu/drm/omapdrm/dss/omapdss.h | 2 -- drivers/gpu/drm/omapdrm/omap_crtc.c | 6 ------ 5 files changed, 24 deletions(-)
diff --git a/drivers/gpu/drm/omapdrm/dss/dispc.c b/drivers/gpu/drm/omapdrm/dss/dispc.c index 5e2e65e88847..1e69c0483f42 100644 --- a/drivers/gpu/drm/omapdrm/dss/dispc.c +++ b/drivers/gpu/drm/omapdrm/dss/dispc.c @@ -2898,13 +2898,6 @@ static int dispc_ovl_enable(struct dispc_device *dispc, return 0; }
-static enum omap_dss_output_id -dispc_mgr_get_supported_outputs(struct dispc_device *dispc, - enum omap_channel channel) -{ - return dss_get_supported_outputs(dispc->dss, channel); -} - static void dispc_lcd_enable_signal_polarity(struct dispc_device *dispc, bool act_high) { @@ -4736,7 +4729,6 @@ static const struct dispc_ops dispc_ops = { .mgr_set_lcd_config = dispc_mgr_set_lcd_config, .mgr_set_timings = dispc_mgr_set_timings, .mgr_setup = dispc_mgr_setup, - .mgr_get_supported_outputs = dispc_mgr_get_supported_outputs, .mgr_gamma_size = dispc_mgr_gamma_size, .mgr_set_gamma = dispc_mgr_set_gamma,
diff --git a/drivers/gpu/drm/omapdrm/dss/dss.c b/drivers/gpu/drm/omapdrm/dss/dss.c index 79bc43135808..e68154ca2b43 100644 --- a/drivers/gpu/drm/omapdrm/dss/dss.c +++ b/drivers/gpu/drm/omapdrm/dss/dss.c @@ -671,12 +671,6 @@ unsigned long dss_get_max_fck_rate(struct dss_device *dss) return dss->feat->fck_freq_max; }
-enum omap_dss_output_id dss_get_supported_outputs(struct dss_device *dss, - enum omap_channel channel) -{ - return dss->feat->outputs[channel]; -} - static int dss_setup_default_clock(struct dss_device *dss) { unsigned long max_dss_fck, prate; diff --git a/drivers/gpu/drm/omapdrm/dss/dss.h b/drivers/gpu/drm/omapdrm/dss/dss.h index 6dc2965649e8..5018e04d5651 100644 --- a/drivers/gpu/drm/omapdrm/dss/dss.h +++ b/drivers/gpu/drm/omapdrm/dss/dss.h @@ -314,8 +314,6 @@ void dss_runtime_put(struct dss_device *dss);
unsigned long dss_get_dispc_clk_rate(struct dss_device *dss); unsigned long dss_get_max_fck_rate(struct dss_device *dss); -enum omap_dss_output_id dss_get_supported_outputs(struct dss_device *dss, - enum omap_channel channel); int dss_dpi_select_source(struct dss_device *dss, int port, enum omap_channel channel); void dss_select_hdmi_venc_clk_source(struct dss_device *dss, diff --git a/drivers/gpu/drm/omapdrm/dss/omapdss.h b/drivers/gpu/drm/omapdrm/dss/omapdss.h index 9ba7c7e6e4f0..004195829b4f 100644 --- a/drivers/gpu/drm/omapdrm/dss/omapdss.h +++ b/drivers/gpu/drm/omapdrm/dss/omapdss.h @@ -634,8 +634,6 @@ struct dispc_ops { const struct videomode *vm); void (*mgr_setup)(struct dispc_device *dispc, enum omap_channel channel, const struct omap_overlay_manager_info *info); - enum omap_dss_output_id (*mgr_get_supported_outputs)( - struct dispc_device *dispc, enum omap_channel channel); u32 (*mgr_gamma_size)(struct dispc_device *dispc, enum omap_channel channel); void (*mgr_set_gamma)(struct dispc_device *dispc, diff --git a/drivers/gpu/drm/omapdrm/omap_crtc.c b/drivers/gpu/drm/omapdrm/omap_crtc.c index 5a56c8e02179..90917d040ddb 100644 --- a/drivers/gpu/drm/omapdrm/omap_crtc.c +++ b/drivers/gpu/drm/omapdrm/omap_crtc.c @@ -114,12 +114,6 @@ static int omap_crtc_dss_connect(struct omap_drm_private *priv, enum omap_channel channel, struct omap_dss_device *dst) { - const struct dispc_ops *dispc_ops = priv->dispc_ops; - struct dispc_device *dispc = priv->dispc; - - if (!(dispc_ops->mgr_get_supported_outputs(dispc, channel) & dst->id)) - return -EINVAL; - dst->dispc_channel_connected = true;
return 0;