Re: [PATCH 02/20] clk: multiplier: Prevent the multiplier from under / over flowing

Hi Mike, Stephen,

On Mon, May 16, 2016 at 02:47:02PM +0200, Maxime Ripard wrote:

In the current multiplier base clock implementation, if the CLK_SET_RATE_PARENT flag isn't set, the code will not make sure that the multiplier computed remains within the boundaries of our clock.

This means that if the clock we want to reach is below the parent rate, or if the multiplier is above the maximum that we can reach, we will end up with a completely bogus one that the clock cannot achieve.

Fixes: f2e0a53271a4 ("clk: Add a basic multiplier clock") Signed-off-by: Maxime Ripard maxime.ripard@free-electrons.com

Any comments?

Thanks! Maxime