Re: [PATCH 4/5] drm/msm/dp: Store each subblock in the io region

Quoting Bjorn Andersson (2021-07-21 19:42:26)

Not all platforms has DP_P0 at offset 0x1000 from the beginning of the DP block. So dss_io_data into representing each of the sub-regions, to

"So dss_io_data into" doesn't make sense to me. Is some word or words missing?

make it possible in the next patch to specify each of the sub-regions individually.

Signed-off-by: Bjorn Andersson bjorn.andersson@linaro.org

drivers/gpu/drm/msm/dp/dp_catalog.c | 64 +++++++++-------------------- drivers/gpu/drm/msm/dp/dp_parser.c | 30 ++++++++++++-- drivers/gpu/drm/msm/dp/dp_parser.h | 10 ++++- 3 files changed, 54 insertions(+), 50 deletions(-)

diff --git a/drivers/gpu/drm/msm/dp/dp_parser.c b/drivers/gpu/drm/msm/dp/dp_parser.c index e68dacef547c..1a10901ae574 100644 --- a/drivers/gpu/drm/msm/dp/dp_parser.c +++ b/drivers/gpu/drm/msm/dp/dp_parser.c @@ -11,6 +11,15 @@ #include "dp_parser.h" #include "dp_reg.h"

+#define DP_DEFAULT_AHB_OFFSET 0x0000 +#define DP_DEFAULT_AHB_SIZE 0x0200 +#define DP_DEFAULT_AUX_OFFSET 0x0200 +#define DP_DEFAULT_AUX_SIZE 0x0200 +#define DP_DEFAULT_LINK_OFFSET 0x0400 +#define DP_DEFAULT_LINK_SIZE 0x0C00 +#define DP_DEFAULT_P0_OFFSET 0x1000 +#define DP_DEFAULT_P0_SIZE 0x0400

static const struct dp_regulator_cfg sdm845_dp_reg_cfg = { .num = 2, .regs = { @@ -48,12 +57,25 @@ static int dp_parser_ctrl_res(struct dp_parser *parser) struct dp_io *io = &parser->io; struct dss_io_data *dss = &io->dp_controller;

•   dss->base = dp_ioremap(pdev, 0, &dss->len);
  

•   if (IS_ERR(dss->base)) {
  

•           DRM_ERROR("unable to remap dp io region: %pe\n", dss->base);
  

•           return PTR_ERR(dss->base);
  

•   dss->ahb = dp_ioremap(pdev, 0, &dss->ahb_len);
  

So many layers of gunky goo!

•   if (IS_ERR(dss->ahb)) {
  

•           DRM_ERROR("unable to remap ahb region: %pe\n", dss->ahb);
  

•           return PTR_ERR(dss->ahb);
    }
  
  

•   if (dss->ahb_len < DP_DEFAULT_P0_OFFSET + DP_DEFAULT_P0_SIZE) {
  

•           DRM_ERROR("legacy memory region not large enough\n");
  

•           return -EINVAL;
  

•   }
  

•   dss->ahb_len = DP_DEFAULT_AHB_SIZE;
  

•   dss->aux = dss->ahb + DP_DEFAULT_AUX_OFFSET;
  

•   dss->aux_len = DP_DEFAULT_AUX_SIZE;
  

•   dss->link = dss->ahb + DP_DEFAULT_LINK_OFFSET;
  

•   dss->link_len = DP_DEFAULT_LINK_SIZE;
  

•   dss->p0 = dss->ahb + DP_DEFAULT_P0_OFFSET;
  

•   dss->p0_len = DP_DEFAULT_P0_SIZE;
  

•   io->phy = devm_phy_get(&pdev->dev, "dp");
    if (IS_ERR(io->phy))
            return PTR_ERR(io->phy);
  

diff --git a/drivers/gpu/drm/msm/dp/dp_parser.h b/drivers/gpu/drm/msm/dp/dp_parser.h index dc62e70b1640..3266b529c090 100644 --- a/drivers/gpu/drm/msm/dp/dp_parser.h +++ b/drivers/gpu/drm/msm/dp/dp_parser.h @@ -26,8 +26,14 @@ enum dp_pm_type { };

struct dss_io_data {

•   size_t len;
  

•   void __iomem *base;
  

•   void __iomem *ahb;
  

•   size_t ahb_len;
  

Maybe make another struct and have a few of them here

struct dss_io_region { void __iomem *base; size_t len; };

then the code reads as aux.base and aux.len and we know they're closely related.

•   void __iomem *aux;
  

•   size_t aux_len;
  

•   void __iomem *link;
  

•   size_t link_len;
  

•   void __iomem *p0;
  

•   size_t p0_len;